DragonOS-Community/DragonOS
4
1
Fork 0
mirror of https://github.com/DragonOS-Community/DragonOS.git synced 2025-06-22 19:33:26 +00:00
Code Issues Releases Wiki Activity

riscv64: 添加flush tlb的ipi (#636)

Browse Source 
* riscv64: 添加flush tlb的ipi

* update triagebot
This commit is contained in:
LoGin
2024-03-21 21:35:39 +08:00
committed by GitHub
parent b4eb05a17f
commit 70f159a398
6 changed files with 148 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
kernel/src/arch/riscv64/cpu.rs
View File

@ -1,4 +1,5 @@
use alloc::vec::Vec;
use sbi_rt::HartMask;
use crate::{
init::boot_params,
@ -10,6 +11,9 @@ use crate::{
/// 栈对齐
pub(super) const STACK_ALIGN: usize = 16;
/// RISC-V的XLEN，也就是寄存器的位宽
pub const RISCV_XLEN: usize = core::mem::size_of::<usize>() * 8;
/// 获取当前cpu的id
#[inline]
pub fn current_cpu_id() -> ProcessorId {
@ -21,7 +25,13 @@ pub fn current_cpu_id() -> ProcessorId {
unsafe { (*ptr).current_cpu() }
}
impl Into<HartMask> for ProcessorId {
fn into(self) -> HartMask {
let base = self.data() as usize / RISCV_XLEN;
let offset = self.data() as usize & (RISCV_XLEN - 1);
HartMask::from_mask_base(offset, base)
}
}
/// 重置cpu
pub unsafe fn cpu_reset() -> ! {
sbi_rt::system_reset(sbi_rt::WarmReboot, sbi_rt::NoReason);