mirror of
https://github.com/DragonOS-Community/DragonOS.git
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refactor: 删除过时的va-pa转换函数,改为统一使用MMArch (#862)
This commit is contained in:
parent
86ee1395de
commit
816ee5ae54
@ -10,8 +10,8 @@ use crate::arch::mm::{LockedFrameAllocator, PageMapper};
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use crate::arch::x86_64::mm::X86_64MMArch;
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use crate::arch::x86_64::mm::X86_64MMArch;
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use crate::arch::MMArch;
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use crate::arch::MMArch;
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use crate::mm::{phys_2_virt, VirtAddr};
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use crate::mm::{MemoryManagementArch, PageTableKind};
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use crate::mm::{MemoryManagementArch, PageTableKind};
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use crate::mm::{PhysAddr, VirtAddr};
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use crate::virt::kvm::vcpu::Vcpu;
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use crate::virt::kvm::vcpu::Vcpu;
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use crate::virt::kvm::vm::Vm;
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use crate::virt::kvm::vm::Vm;
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use alloc::alloc::Global;
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use alloc::alloc::Global;
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@ -476,14 +476,9 @@ pub fn get_segment_base(gdt_base: *const u64, gdt_size: u16, segment_selector: u
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let base_mid = (descriptor & 0x0000_00FF_0000_0000) >> 16;
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let base_mid = (descriptor & 0x0000_00FF_0000_0000) >> 16;
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let base_low = (descriptor & 0x0000_0000_FFFF_0000) >> 16;
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let base_low = (descriptor & 0x0000_0000_FFFF_0000) >> 16;
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let segment_base = (base_high | base_mid | base_low) & 0xFFFFFFFF;
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let segment_base = (base_high | base_mid | base_low) & 0xFFFFFFFF;
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let virtaddr = phys_2_virt(segment_base.try_into().unwrap())
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let virtaddr = unsafe { MMArch::phys_2_virt(PhysAddr::new(segment_base as usize)).unwrap() };
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.try_into()
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.unwrap();
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return virtaddr.data() as u64;
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debug!(
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"segment_base={:x}",
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phys_2_virt(segment_base.try_into().unwrap())
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);
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return virtaddr;
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}
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}
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// FIXME: may have bug
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// FIXME: may have bug
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@ -1,4 +1,5 @@
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use super::{_port, hba::HbaCmdTable, virt_2_phys};
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use super::{_port, hba::HbaCmdTable};
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use crate::arch::MMArch;
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use crate::driver::base::block::block_device::{BlockDevice, BlockId};
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use crate::driver::base::block::block_device::{BlockDevice, BlockId};
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use crate::driver::base::block::disk_info::Partition;
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use crate::driver::base::block::disk_info::Partition;
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use crate::driver::base::class::Class;
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use crate::driver::base::class::Class;
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@ -19,7 +20,7 @@ use crate::driver::disk::ahci::hba::{
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};
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};
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use crate::libs::rwlock::{RwLockReadGuard, RwLockWriteGuard};
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use crate::libs::rwlock::{RwLockReadGuard, RwLockWriteGuard};
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use crate::libs::spinlock::SpinLock;
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use crate::libs::spinlock::SpinLock;
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use crate::mm::{phys_2_virt, verify_area, VirtAddr};
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use crate::mm::{verify_area, MemoryManagementArch, PhysAddr, VirtAddr};
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use log::error;
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use log::error;
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use system_error::SystemError;
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use system_error::SystemError;
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@ -86,9 +87,11 @@ impl AhciDisk {
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#[allow(unused_unsafe)]
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#[allow(unused_unsafe)]
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let cmdheader: &mut HbaCmdHeader = unsafe {
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let cmdheader: &mut HbaCmdHeader = unsafe {
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(phys_2_virt(
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(MMArch::phys_2_virt(PhysAddr::new(
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volatile_read!(port.clb) as usize + slot as usize * size_of::<HbaCmdHeader>(),
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volatile_read!(port.clb) as usize + slot as usize * size_of::<HbaCmdHeader>(),
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) as *mut HbaCmdHeader)
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))
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.unwrap()
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.data() as *mut HbaCmdHeader)
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.as_mut()
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.as_mut()
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.unwrap()
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.unwrap()
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};
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};
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@ -118,7 +121,9 @@ impl AhciDisk {
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#[allow(unused_unsafe)]
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#[allow(unused_unsafe)]
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let cmdtbl = unsafe {
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let cmdtbl = unsafe {
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(phys_2_virt(volatile_read!(cmdheader.ctba) as usize) as *mut HbaCmdTable)
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(MMArch::phys_2_virt(PhysAddr::new(volatile_read!(cmdheader.ctba) as usize))
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.unwrap()
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.data() as *mut HbaCmdTable)
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.as_mut()
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.as_mut()
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.unwrap() // 必须使用 as_mut ,得到的才是原来的变量
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.unwrap() // 必须使用 as_mut ,得到的才是原来的变量
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};
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};
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@ -132,7 +137,10 @@ impl AhciDisk {
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// 8K bytes (16 sectors) per PRDT
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// 8K bytes (16 sectors) per PRDT
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for i in 0..((volatile_read!(cmdheader.prdtl) - 1) as usize) {
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for i in 0..((volatile_read!(cmdheader.prdtl) - 1) as usize) {
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volatile_write!(cmdtbl.prdt_entry[i].dba, virt_2_phys(buf_ptr) as u64);
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volatile_write!(
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cmdtbl.prdt_entry[i].dba,
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MMArch::virt_2_phys(VirtAddr::new(buf_ptr)).unwrap().data() as u64
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);
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cmdtbl.prdt_entry[i].dbc = 8 * 1024 - 1;
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cmdtbl.prdt_entry[i].dbc = 8 * 1024 - 1;
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volatile_set_bit!(cmdtbl.prdt_entry[i].dbc, 1 << 31, true); // 允许中断 prdt_entry.i
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volatile_set_bit!(cmdtbl.prdt_entry[i].dbc, 1 << 31, true); // 允许中断 prdt_entry.i
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buf_ptr += 8 * 1024;
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buf_ptr += 8 * 1024;
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@ -141,7 +149,10 @@ impl AhciDisk {
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// Last entry
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// Last entry
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let las = (volatile_read!(cmdheader.prdtl) - 1) as usize;
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let las = (volatile_read!(cmdheader.prdtl) - 1) as usize;
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volatile_write!(cmdtbl.prdt_entry[las].dba, virt_2_phys(buf_ptr) as u64);
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volatile_write!(
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cmdtbl.prdt_entry[las].dba,
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MMArch::virt_2_phys(VirtAddr::new(buf_ptr)).unwrap().data() as u64
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);
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cmdtbl.prdt_entry[las].dbc = ((tmp_count << 9) - 1) as u32; // 数据长度
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cmdtbl.prdt_entry[las].dbc = ((tmp_count << 9) - 1) as u32; // 数据长度
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volatile_set_bit!(cmdtbl.prdt_entry[las].dbc, 1 << 31, true); // 允许中断
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volatile_set_bit!(cmdtbl.prdt_entry[las].dbc, 1 << 31, true); // 允许中断
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@ -233,9 +244,11 @@ impl AhciDisk {
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compiler_fence(Ordering::SeqCst);
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compiler_fence(Ordering::SeqCst);
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#[allow(unused_unsafe)]
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#[allow(unused_unsafe)]
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let cmdheader: &mut HbaCmdHeader = unsafe {
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let cmdheader: &mut HbaCmdHeader = unsafe {
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(phys_2_virt(
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(MMArch::phys_2_virt(PhysAddr::new(
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volatile_read!(port.clb) as usize + slot as usize * size_of::<HbaCmdHeader>(),
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volatile_read!(port.clb) as usize + slot as usize * size_of::<HbaCmdHeader>(),
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) as *mut HbaCmdHeader)
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))
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.unwrap()
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.data() as *mut HbaCmdHeader)
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.as_mut()
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.as_mut()
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.unwrap()
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.unwrap()
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};
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};
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@ -272,7 +285,9 @@ impl AhciDisk {
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#[allow(unused_unsafe)]
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#[allow(unused_unsafe)]
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let cmdtbl = unsafe {
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let cmdtbl = unsafe {
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(phys_2_virt(volatile_read!(cmdheader.ctba) as usize) as *mut HbaCmdTable)
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(MMArch::phys_2_virt(PhysAddr::new(volatile_read!(cmdheader.ctba) as usize))
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.unwrap()
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.data() as *mut HbaCmdTable)
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.as_mut()
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.as_mut()
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.unwrap()
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.unwrap()
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};
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};
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@ -286,7 +301,10 @@ impl AhciDisk {
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// 8K bytes (16 sectors) per PRDT
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// 8K bytes (16 sectors) per PRDT
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for i in 0..((volatile_read!(cmdheader.prdtl) - 1) as usize) {
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for i in 0..((volatile_read!(cmdheader.prdtl) - 1) as usize) {
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volatile_write!(cmdtbl.prdt_entry[i].dba, virt_2_phys(buf_ptr) as u64);
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volatile_write!(
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cmdtbl.prdt_entry[i].dba,
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MMArch::virt_2_phys(VirtAddr::new(buf_ptr)).unwrap().data() as u64
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);
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volatile_write_bit!(cmdtbl.prdt_entry[i].dbc, (1 << 22) - 1, 8 * 1024 - 1); // 数据长度
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volatile_write_bit!(cmdtbl.prdt_entry[i].dbc, (1 << 22) - 1, 8 * 1024 - 1); // 数据长度
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volatile_set_bit!(cmdtbl.prdt_entry[i].dbc, 1 << 31, true); // 允许中断
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volatile_set_bit!(cmdtbl.prdt_entry[i].dbc, 1 << 31, true); // 允许中断
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buf_ptr += 8 * 1024;
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buf_ptr += 8 * 1024;
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@ -295,7 +313,10 @@ impl AhciDisk {
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// Last entry
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// Last entry
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let las = (volatile_read!(cmdheader.prdtl) - 1) as usize;
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let las = (volatile_read!(cmdheader.prdtl) - 1) as usize;
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volatile_write!(cmdtbl.prdt_entry[las].dba, virt_2_phys(buf_ptr) as u64);
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volatile_write!(
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cmdtbl.prdt_entry[las].dba,
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MMArch::virt_2_phys(VirtAddr::new(buf_ptr)).unwrap().data() as u64
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);
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volatile_set_bit!(cmdtbl.prdt_entry[las].dbc, 1 << 31, true); // 允许中断
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volatile_set_bit!(cmdtbl.prdt_entry[las].dbc, 1 << 31, true); // 允许中断
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volatile_write_bit!(
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volatile_write_bit!(
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cmdtbl.prdt_entry[las].dbc,
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cmdtbl.prdt_entry[las].dbc,
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@ -2,7 +2,8 @@ use core::{intrinsics::size_of, ptr};
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use core::sync::atomic::compiler_fence;
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use core::sync::atomic::compiler_fence;
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use crate::mm::phys_2_virt;
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use crate::arch::MMArch;
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use crate::mm::{MemoryManagementArch, PhysAddr};
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/// 文件说明: 实现了 AHCI 中的控制器 HBA 的相关行为
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/// 文件说明: 实现了 AHCI 中的控制器 HBA 的相关行为
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@ -198,7 +199,13 @@ impl HbaPort {
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unsafe {
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unsafe {
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compiler_fence(core::sync::atomic::Ordering::SeqCst);
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compiler_fence(core::sync::atomic::Ordering::SeqCst);
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ptr::write_bytes(phys_2_virt(clb as usize) as *mut u64, 0, 1024);
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ptr::write_bytes(
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MMArch::phys_2_virt(PhysAddr::new(clb as usize))
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.unwrap()
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.data() as *mut u64,
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0,
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1024,
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);
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}
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}
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// 赋值 fis base address
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// 赋值 fis base address
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@ -207,20 +214,36 @@ impl HbaPort {
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volatile_write!(self.fb, fb);
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volatile_write!(self.fb, fb);
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unsafe {
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unsafe {
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compiler_fence(core::sync::atomic::Ordering::SeqCst);
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compiler_fence(core::sync::atomic::Ordering::SeqCst);
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ptr::write_bytes(phys_2_virt(fb as usize) as *mut u64, 0, 256);
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ptr::write_bytes(
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MMArch::phys_2_virt(PhysAddr::new(fb as usize))
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.unwrap()
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.data() as *mut u64,
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0,
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256,
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);
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}
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}
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// 赋值 command table base address
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// 赋值 command table base address
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// Command table offset: 40K + 8K*portno
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// Command table offset: 40K + 8K*portno
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// Command table size = 256*32 = 8K per port
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// Command table size = 256*32 = 8K per port
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let mut cmdheaders = phys_2_virt(clb as usize) as *mut u64 as *mut HbaCmdHeader;
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let mut cmdheaders = unsafe {
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MMArch::phys_2_virt(PhysAddr::new(clb as usize))
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.unwrap()
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.data()
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} as *mut u64 as *mut HbaCmdHeader;
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for ctbas_value in ctbas.iter().take(32) {
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for ctbas_value in ctbas.iter().take(32) {
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volatile_write!((*cmdheaders).prdtl, 0); // 一开始没有询问,prdtl = 0(预留了8个PRDT项的空间)
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volatile_write!((*cmdheaders).prdtl, 0); // 一开始没有询问,prdtl = 0(预留了8个PRDT项的空间)
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volatile_write!((*cmdheaders).ctba, *ctbas_value);
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volatile_write!((*cmdheaders).ctba, *ctbas_value);
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// 这里限制了 prdtl <= 8, 所以一共用了256bytes,如果需要修改,可以修改这里
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// 这里限制了 prdtl <= 8, 所以一共用了256bytes,如果需要修改,可以修改这里
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compiler_fence(core::sync::atomic::Ordering::SeqCst);
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compiler_fence(core::sync::atomic::Ordering::SeqCst);
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unsafe {
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unsafe {
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ptr::write_bytes(phys_2_virt(*ctbas_value as usize) as *mut u64, 0, 256);
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ptr::write_bytes(
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MMArch::phys_2_virt(PhysAddr::new(*ctbas_value as usize))
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.unwrap()
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.data() as *mut u64,
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0,
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256,
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);
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}
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}
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cmdheaders = (cmdheaders as usize + size_of::<HbaCmdHeader>()) as *mut HbaCmdHeader;
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cmdheaders = (cmdheaders as usize + size_of::<HbaCmdHeader>()) as *mut HbaCmdHeader;
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}
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}
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@ -3,6 +3,7 @@ pub mod ahci_inode;
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pub mod ahcidisk;
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pub mod ahcidisk;
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pub mod hba;
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pub mod hba;
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use crate::arch::MMArch;
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use crate::driver::base::block::disk_info::BLK_GF_AHCI;
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use crate::driver::base::block::disk_info::BLK_GF_AHCI;
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use crate::driver::block::cache::cached_block_device::BlockCache;
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use crate::driver::block::cache::cached_block_device::BlockCache;
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// 依赖的rust工具包
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// 依赖的rust工具包
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@ -18,7 +19,7 @@ use crate::driver::disk::ahci::{
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};
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};
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use crate::libs::rwlock::RwLockWriteGuard;
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use crate::libs::rwlock::RwLockWriteGuard;
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use crate::libs::spinlock::{SpinLock, SpinLockGuard};
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use crate::libs::spinlock::{SpinLock, SpinLockGuard};
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use crate::mm::virt_2_phys;
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use crate::mm::{MemoryManagementArch, VirtAddr};
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use ahci_inode::LockedAhciInode;
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use ahci_inode::LockedAhciInode;
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use alloc::{boxed::Box, collections::LinkedList, format, string::String, sync::Arc, vec::Vec};
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use alloc::{boxed::Box, collections::LinkedList, format, string::String, sync::Arc, vec::Vec};
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use core::sync::atomic::compiler_fence;
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use core::sync::atomic::compiler_fence;
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@ -97,13 +98,25 @@ pub fn ahci_init() -> Result<(), SystemError> {
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debug!("<ahci_rust_init> Find a {:?} type Disk.", tp);
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debug!("<ahci_rust_init> Find a {:?} type Disk.", tp);
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// 计算地址
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// 计算地址
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let fb = virt_2_phys(ahci_port_base_vaddr + (32 << 10) + (j << 8));
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let fb = unsafe {
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let clb = virt_2_phys(ahci_port_base_vaddr + (j << 10));
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MMArch::virt_2_phys(VirtAddr::new(
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ahci_port_base_vaddr + (32 << 10) + (j << 8),
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))
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}
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.unwrap()
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.data();
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let clb = unsafe {
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MMArch::virt_2_phys(VirtAddr::new(ahci_port_base_vaddr + (j << 10)))
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.unwrap()
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.data()
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};
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let ctbas = (0..32)
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let ctbas = (0..32)
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.map(|x| {
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.map(|x| unsafe {
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virt_2_phys(
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MMArch::virt_2_phys(VirtAddr::new(
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ahci_port_base_vaddr + (40 << 10) + (j << 13) + (x << 8),
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ahci_port_base_vaddr + (40 << 10) + (j << 13) + (x << 8),
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) as u64
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))
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.unwrap()
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.data() as u64
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})
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})
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.collect::<Vec<_>>();
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.collect::<Vec<_>>();
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@ -1,7 +1,7 @@
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use alloc::sync::Arc;
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use alloc::sync::Arc;
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use system_error::SystemError;
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use system_error::SystemError;
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use crate::{arch::MMArch, include::bindings::bindings::PAGE_OFFSET};
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use crate::arch::MMArch;
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use core::{
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use core::{
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cmp,
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cmp,
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@ -121,18 +121,6 @@ pub unsafe fn set_IDLE_PROCESS_ADDRESS_SPACE(address_space: Arc<AddressSpace>) {
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__IDLE_PROCESS_ADDRESS_SPACE = Some(address_space);
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__IDLE_PROCESS_ADDRESS_SPACE = Some(address_space);
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}
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}
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/// @brief 将内核空间的虚拟地址转换为物理地址
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#[inline(always)]
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pub fn virt_2_phys(addr: usize) -> usize {
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addr - PAGE_OFFSET as usize
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}
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/// @brief 将物理地址转换为内核空间的虚拟地址
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#[inline(always)]
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pub fn phys_2_virt(addr: usize) -> usize {
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|
||||||
addr + PAGE_OFFSET as usize
|
|
||||||
}
|
|
||||||
|
|
||||||
#[derive(Clone, Copy, Debug, Eq, Ord, PartialEq, PartialOrd, Hash)]
|
#[derive(Clone, Copy, Debug, Eq, Ord, PartialEq, PartialOrd, Hash)]
|
||||||
pub enum PageTableKind {
|
pub enum PageTableKind {
|
||||||
/// 用户可访问的页表
|
/// 用户可访问的页表
|
||||||
|
@ -154,7 +154,7 @@ impl MMMonitorThread {
|
|||||||
info!("MMMonitorThread::run(): kmem_path: {:?}", self.kmem_path);
|
info!("MMMonitorThread::run(): kmem_path: {:?}", self.kmem_path);
|
||||||
|
|
||||||
let mut kmem_file = {
|
let mut kmem_file = {
|
||||||
let mut file: File;
|
let file: File;
|
||||||
loop {
|
loop {
|
||||||
let f = self.open_kmem_file();
|
let f = self.open_kmem_file();
|
||||||
if f.is_ok() {
|
if f.is_ok() {
|
||||||
|
Loading…
x
Reference in New Issue
Block a user