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🆕 读取SATA磁盘
This commit is contained in:
fslongjin
parent
1d440adc02
commit
8294e0d12b
@ -1,19 +1,304 @@
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#include "ahci.h"
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#include "ahci.h"
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#include "../../../common/kprint.h"
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#include "../../../common/kprint.h"
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#include "../../../mm/slab.h"
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struct pci_device_structure_header_t *ahci_devs[MAX_AHCI_DEVICES];
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struct pci_device_structure_header_t *ahci_devices[100];
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uint32_t count_ahci_devices = 0;
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uint32_t count_ahci_devices = 0;
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uint64_t ahci_port_base_vaddr; // 端口映射base addr
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static void start_cmd(HBA_PORT *port);
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static void stop_cmd(HBA_PORT *port);
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static void port_rebase(HBA_PORT *port, int portno);
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// Find a free command list slot
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static int ahci_find_cmdslot(HBA_PORT *port);
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// 计算HBA_MEM的虚拟内存地址
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#define cal_HBA_MEM_VIRT_ADDR(device_num) (AHCI_MAPPING_BASE + (ul)(((struct pci_device_structure_general_device_t *)(ahci_devs[device_num]))->BAR5 - ((((struct pci_device_structure_general_device_t *)(ahci_devs[0]))->BAR5) & PAGE_2M_MASK)))
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/**
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/**
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* @brief 初始化ahci模块
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* @brief 初始化ahci模块
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*
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*
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*/
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*/
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void ahci_init()
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void ahci_init()
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{
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{
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pci_get_device_structure(0x1, 0x6, ahci_devices, &count_ahci_devices);
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pci_get_device_structure(0x1, 0x6, ahci_devs, &count_ahci_devices);
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for(int i=0;i<count_ahci_devices;++i)
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kdebug("phys addr=%#018lx", (ul)(((struct pci_device_structure_general_device_t *)(ahci_devs[0]))->BAR5));
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// 映射ABAR
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mm_map_phys_addr(AHCI_MAPPING_BASE, ((ul)(((struct pci_device_structure_general_device_t *)(ahci_devs[0]))->BAR5)) & PAGE_2M_MASK, PAGE_2M_SIZE, PAGE_KERNEL_PAGE | PAGE_PWT | PAGE_PCD);
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kdebug("ABAR mapped!");
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for (int i = 0; i < count_ahci_devices; ++i)
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{
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{
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kdebug("[%d] class_code=%d, sub_class=%d, progIF=%d", i, ahci_devices[i]->Class_code, ahci_devices[i]->SubClass, ahci_devices[i]->ProgIF);
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kdebug("[%d] class_code=%d, sub_class=%d, progIF=%d, ABAR=%#010lx", i, ahci_devs[i]->Class_code, ahci_devs[i]->SubClass, ahci_devs[i]->ProgIF, ((struct pci_device_structure_general_device_t *)(ahci_devs[i]))->BAR5);
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// 赋值HBA_MEM结构体
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ahci_devices[i].dev_struct = ahci_devs[i];
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ahci_devices[i].hba_mem = (HBA_MEM *)(cal_HBA_MEM_VIRT_ADDR(i));
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}
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ahci_port_base_vaddr = (uint64_t)kmalloc(1048576, 0);
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ahci_probe_port(0);
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port_rebase(&ahci_devices[0].hba_mem->ports[0], 0);
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uint64_t buf[100];
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bool res = ahci_read(&(ahci_devices[0].hba_mem->ports[0]), 0, 0, 1, (uint64_t)&buf);
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kdebug("res=%d, buf[0]=%#010lx", (uint)res, (uint32_t)buf[0]);
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}
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// Check device type
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static int check_type(HBA_PORT *port)
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{
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uint32_t ssts = port->ssts;
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uint8_t ipm = (ssts >> 8) & 0x0F;
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uint8_t det = ssts & 0x0F;
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if (det != HBA_PORT_DET_PRESENT) // Check drive status
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return AHCI_DEV_NULL;
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if (ipm != HBA_PORT_IPM_ACTIVE)
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return AHCI_DEV_NULL;
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switch (port->sig)
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{
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case SATA_SIG_ATAPI:
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return AHCI_DEV_SATAPI;
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case SATA_SIG_SEMB:
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return AHCI_DEV_SEMB;
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case SATA_SIG_PM:
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return AHCI_DEV_PM;
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default:
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return AHCI_DEV_SATA;
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}
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}
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}
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}
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/**
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* @brief 检测端口连接的设备的类型
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*
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* @param device_num ahci设备号
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*/
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void ahci_probe_port(const uint32_t device_num)
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{
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HBA_MEM *abar = ahci_devices[device_num].hba_mem;
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uint32_t pi = abar->pi;
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for (int i = 0; i < 32; ++i, (pi >>= 1))
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{
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if (pi & 1)
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{
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uint dt = check_type(&abar->ports[i]);
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ahci_devices[i].type = dt;
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if (dt == AHCI_DEV_SATA)
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{
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kdebug("SATA drive found at port %d", i);
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}
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else if (dt == AHCI_DEV_SATAPI)
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{
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kdebug("SATAPI drive found at port %d", i);
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}
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else if (dt == AHCI_DEV_SEMB)
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{
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kdebug("SEMB drive found at port %d", i);
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}
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else if (dt == AHCI_DEV_PM)
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{
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kdebug("PM drive found at port %d", i);
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}
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else
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{
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kdebug("No drive found at port %d", i);
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}
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}
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}
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}
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// Start command engine
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static void start_cmd(HBA_PORT *port)
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{
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// Wait until CR (bit15) is cleared
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while (port->cmd & HBA_PxCMD_CR)
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;
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// Set FRE (bit4) and ST (bit0)
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port->cmd |= HBA_PxCMD_FRE;
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port->cmd |= HBA_PxCMD_ST;
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}
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// Stop command engine
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static void stop_cmd(HBA_PORT *port)
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{
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// Clear ST (bit0)
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port->cmd &= ~HBA_PxCMD_ST;
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// Clear FRE (bit4)
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port->cmd &= ~HBA_PxCMD_FRE;
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// Wait until FR (bit14), CR (bit15) are cleared
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while (1)
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{
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if (port->cmd & HBA_PxCMD_FR)
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continue;
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if (port->cmd & HBA_PxCMD_CR)
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continue;
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break;
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}
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}
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static void port_rebase(HBA_PORT *port, int portno)
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{
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// Before rebasing Port memory space, OS must wait for current pending commands to finish
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// and tell HBA to stop receiving FIS from the port. Otherwise an accidently incoming FIS may be
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// written into a partially configured memory area.
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stop_cmd(port); // Stop command engine
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// Command list offset: 1K*portno
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// Command list entry size = 32
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// Command list entry maxim count = 32
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// Command list maxim size = 32*32 = 1K per port
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port->clb = ahci_port_base_vaddr + (portno << 10);
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memset((void *)(port->clb), 0, 1024);
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// FIS offset: 32K+256*portno
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// FIS entry size = 256 bytes per port
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port->fb = ahci_port_base_vaddr + (32 << 10) + (portno << 8);
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memset((void *)(port->fb), 0, 256);
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// Command table offset: 40K + 8K*portno
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// Command table size = 256*32 = 8K per port
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HBA_CMD_HEADER *cmdheader = (HBA_CMD_HEADER *)(port->clb);
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for (int i = 0; i < 32; ++i)
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{
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cmdheader[i].prdtl = 8; // 8 prdt entries per command table
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// 256 bytes per command table, 64+16+48+16*8
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// Command table offset: 40K + 8K*portno + cmdheader_index*256
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cmdheader[i].ctba = ahci_port_base_vaddr + (40 << 10) + (portno << 13) + (i << 8);
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memset((void *)cmdheader[i].ctba, 0, 256);
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}
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start_cmd(port); // Start command engine
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}
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/**
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* @brief read data from SATA device using 48bit LBA address
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*
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* @param port HBA PORT
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* @param startl low 32bits of start addr
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* @param starth high 32bits of start addr
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* @param count total sectors to read
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* @param buf buffer
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* @return true done
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* @return false failed
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*/
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bool ahci_read(HBA_PORT *port, uint32_t startl, uint32_t starth, uint32_t count, uint64_t buf)
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{
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port->is = (uint32_t)-1; // Clear pending interrupt bits
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int spin = 0; // Spin lock timeout counter
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int slot = ahci_find_cmdslot(port);
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if (slot == -1)
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return false;
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HBA_CMD_HEADER *cmdheader = (HBA_CMD_HEADER *)port->clb;
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cmdheader += slot;
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cmdheader->cfl = sizeof(FIS_REG_H2D) / sizeof(uint32_t); // Command FIS size
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cmdheader->w = 0; // Read from device
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cmdheader->prdtl = (uint16_t)((count - 1) >> 4) + 1; // PRDT entries count
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HBA_CMD_TBL *cmdtbl = (HBA_CMD_TBL *)(cmdheader->ctba);
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memset(cmdtbl, 0, sizeof(HBA_CMD_TBL) + (cmdheader->prdtl - 1) * sizeof(HBA_PRDT_ENTRY));
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// 8K bytes (16 sectors) per PRDT
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int i;
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for (i = 0; i < cmdheader->prdtl - 1; ++i)
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{
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cmdtbl->prdt_entry[i].dba = buf;
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cmdtbl->prdt_entry[i].dbc = 8 * 1024 - 1; // 8K bytes (this value should always be set to 1 less than the actual value)
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cmdtbl->prdt_entry[i].i = 1;
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buf += 4 * 1024; // 4K words
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count -= 16; // 16 sectors
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}
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// Last entry
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cmdtbl->prdt_entry[i].dba = buf;
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cmdtbl->prdt_entry[i].dbc = (count << 9) - 1; // 512 bytes per sector
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cmdtbl->prdt_entry[i].i = 1;
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// Setup command
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FIS_REG_H2D *cmdfis = (FIS_REG_H2D *)(&cmdtbl->cfis);
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cmdfis->fis_type = FIS_TYPE_REG_H2D;
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cmdfis->c = 1; // Command
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cmdfis->command = ATA_CMD_READ_DMA_EXT;
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cmdfis->lba0 = (uint8_t)startl;
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cmdfis->lba1 = (uint8_t)(startl >> 8);
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cmdfis->lba2 = (uint8_t)(startl >> 16);
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cmdfis->device = 1 << 6; // LBA mode
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cmdfis->lba3 = (uint8_t)(startl >> 24);
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cmdfis->lba4 = (uint8_t)starth;
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cmdfis->lba5 = (uint8_t)(starth >> 8);
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cmdfis->countl = count & 0xFF;
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cmdfis->counth = (count >> 8) & 0xFF;
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// The below loop waits until the port is no longer busy before issuing a new command
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while ((port->tfd & (ATA_DEV_BUSY | ATA_DEV_DRQ)) && spin < 1000000)
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{
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spin++;
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}
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if (spin == 1000000)
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{
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kerror("Port is hung");
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return false;
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}
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kdebug("slot=%d", slot);
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port->ci = 1 << slot; // Issue command
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// Wait for completion
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while (1)
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{
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// In some longer duration reads, it may be helpful to spin on the DPS bit
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// in the PxIS port field as well (1 << 5)
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if ((port->ci & (1 << slot)) == 0)
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break;
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if (port->is & HBA_PxIS_TFES) // Task file error
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{
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kerror("Read disk error");
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return false;
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}
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}
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// Check again
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if (port->is & HBA_PxIS_TFES)
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{
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kerror("Read disk error");
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return false;
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}
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return true;
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}
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// Find a free command list slot
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static int ahci_find_cmdslot(HBA_PORT *port)
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{
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// If not set in SACT and CI, the slot is free
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uint32_t slots = (port->sact | port->ci);
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int num_of_cmd_clots = (ahci_devices[0].hba_mem->cap&0x0f00)>>8; // bit 12-8
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for (int i = 0; i < num_of_cmd_clots; i++)
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{
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if ((slots & 1) == 0)
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return i;
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slots >>= 1;
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}
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kerror("Cannot find free command list entry");
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return -1;
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}
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@ -2,6 +2,24 @@
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#include "../block_device.h"
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#include "../block_device.h"
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#include "../../pci/pci.h"
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#include "../../pci/pci.h"
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#include "../../../mm/mm.h"
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#define AHCI_MAPPING_BASE SPECIAL_MEMOEY_MAPPING_VIRT_ADDR_BASE+AHCI_MAPPING_OFFSET
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#define MAX_AHCI_DEVICES 100
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#define HBA_PxCMD_ST 0x0001
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#define HBA_PxCMD_FRE 0x0010
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#define HBA_PxCMD_FR 0x4000
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#define HBA_PxCMD_CR 0x8000
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#define ATA_DEV_BUSY 0x80
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#define ATA_DEV_DRQ 0x08
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#define ATA_CMD_READ_DMA_EXT 0x25
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#define ATA_CMD_WRITE_DMA_EXT 0x30
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#define HBA_PxIS_TFES (1 << 30) /* TFES - Task File Error Status */
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/**
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/**
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* @brief 在SATA3.0规范中定义的Frame Information Structure类型
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* @brief 在SATA3.0规范中定义的Frame Information Structure类型
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@ -180,10 +198,8 @@ typedef struct tagFIS_DMA_SETUP
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typedef volatile struct tagHBA_PORT
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typedef volatile struct tagHBA_PORT
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{
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{
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uint32_t clb; // 0x00, command list base address, 1K-byte aligned
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uint64_t clb; // 0x00, command list base address, 1K-byte aligned
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uint32_t clbu; // 0x04, command list base address upper 32 bits
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uint64_t fb; // 0x08, FIS base address, 256-byte aligned
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uint32_t fb; // 0x08, FIS base address, 256-byte aligned
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uint32_t fbu; // 0x0C, FIS base address upper 32 bits
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uint32_t is; // 0x10, interrupt status
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uint32_t is; // 0x10, interrupt status
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uint32_t ie; // 0x14, interrupt enable
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uint32_t ie; // 0x14, interrupt enable
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uint32_t cmd; // 0x18, command and status
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uint32_t cmd; // 0x18, command and status
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@ -222,7 +238,7 @@ typedef volatile struct tagHBA_MEM
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uint8_t vendor[0x100-0xA0];
|
uint8_t vendor[0x100-0xA0];
|
||||||
|
|
||||||
// 0x100 - 0x10FF, Port control registers
|
// 0x100 - 0x10FF, Port control registers
|
||||||
HBA_PORT ports[1]; // 1 ~ 32
|
HBA_PORT ports[32]; // 1 ~ 32
|
||||||
} HBA_MEM;
|
} HBA_MEM;
|
||||||
|
|
||||||
|
|
||||||
@ -273,8 +289,7 @@ typedef struct tagHBA_CMD_HEADER
|
|||||||
uint32_t prdbc; // Physical region descriptor byte count transferred
|
uint32_t prdbc; // Physical region descriptor byte count transferred
|
||||||
|
|
||||||
// DW2, 3
|
// DW2, 3
|
||||||
uint32_t ctba; // Command table descriptor base address
|
uint64_t ctba; // Command table descriptor base address
|
||||||
uint32_t ctbau; // Command table descriptor base address upper 32 bits
|
|
||||||
|
|
||||||
// DW4 - 7
|
// DW4 - 7
|
||||||
uint32_t rsv1[4]; // Reserved
|
uint32_t rsv1[4]; // Reserved
|
||||||
@ -282,8 +297,7 @@ typedef struct tagHBA_CMD_HEADER
|
|||||||
|
|
||||||
typedef struct tagHBA_PRDT_ENTRY
|
typedef struct tagHBA_PRDT_ENTRY
|
||||||
{
|
{
|
||||||
uint32_t dba; // Data base address
|
uint64_t dba; // Data base address
|
||||||
uint32_t dbau; // Data base address upper 32 bits
|
|
||||||
uint32_t rsv0; // Reserved
|
uint32_t rsv0; // Reserved
|
||||||
|
|
||||||
// DW3
|
// DW3
|
||||||
@ -308,6 +322,12 @@ typedef struct tagHBA_CMD_TBL
|
|||||||
HBA_PRDT_ENTRY prdt_entry[1]; // Physical region descriptor table entries, 0 ~ 65535
|
HBA_PRDT_ENTRY prdt_entry[1]; // Physical region descriptor table entries, 0 ~ 65535
|
||||||
} HBA_CMD_TBL;
|
} HBA_CMD_TBL;
|
||||||
|
|
||||||
|
struct ahci_device_t
|
||||||
|
{
|
||||||
|
uint32_t type; // 设备类型
|
||||||
|
struct pci_device_structure_header_t * dev_struct;
|
||||||
|
HBA_MEM * hba_mem;
|
||||||
|
}ahci_devices[MAX_AHCI_DEVICES];
|
||||||
|
|
||||||
|
|
||||||
#define SATA_SIG_ATA 0x00000101 // SATA drive
|
#define SATA_SIG_ATA 0x00000101 // SATA drive
|
||||||
@ -343,3 +363,23 @@ struct block_device_operation ahci_operation =
|
|||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
void ahci_init();
|
void ahci_init();
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief 检测端口连接的设备的类型
|
||||||
|
*
|
||||||
|
* @param device_num ahci设备号
|
||||||
|
*/
|
||||||
|
void ahci_probe_port(const uint32_t device_num);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief read data from SATA device using 48bit LBA address
|
||||||
|
*
|
||||||
|
* @param port HBA PORT
|
||||||
|
* @param startl low 32bits of start addr
|
||||||
|
* @param starth high 32bits of start addr
|
||||||
|
* @param count total sectors to read
|
||||||
|
* @param buf buffer
|
||||||
|
* @return true done
|
||||||
|
* @return false failed
|
||||||
|
*/
|
||||||
|
bool ahci_read(HBA_PORT *port, uint32_t startl, uint32_t starth, uint32_t count, uint64_t buf);
|
||||||
@ -586,7 +586,6 @@ int pci_enable_msi(void *header, uint8_t vector, uint32_t processor, uint8_t edg
|
|||||||
void pci_get_device_structure(uint8_t class_code, uint8_t sub_class, struct pci_device_structure_header_t *res[], uint32_t *count_res)
|
void pci_get_device_structure(uint8_t class_code, uint8_t sub_class, struct pci_device_structure_header_t *res[], uint32_t *count_res)
|
||||||
{
|
{
|
||||||
|
|
||||||
struct pci_device_structure_header_t *ptr_begin = container_of(pci_device_structure_list, struct pci_device_structure_header_t, list);
|
|
||||||
struct pci_device_structure_header_t *ptr = container_of(pci_device_structure_list, struct pci_device_structure_header_t, list);
|
struct pci_device_structure_header_t *ptr = container_of(pci_device_structure_list, struct pci_device_structure_header_t, list);
|
||||||
*count_res = 0;
|
*count_res = 0;
|
||||||
|
|
||||||
|
|||||||
@ -42,6 +42,8 @@
|
|||||||
#define ACPI_XSDT_MAPPING_OFFSET 0x9000000UL
|
#define ACPI_XSDT_MAPPING_OFFSET 0x9000000UL
|
||||||
#define IO_APIC_MAPPING_OFFSET 0xfec00000UL
|
#define IO_APIC_MAPPING_OFFSET 0xfec00000UL
|
||||||
#define LOCAL_APIC_MAPPING_OFFSET 0xfee00000UL
|
#define LOCAL_APIC_MAPPING_OFFSET 0xfee00000UL
|
||||||
|
#define AHCI_MAPPING_OFFSET 0xff200000UL // AHCI 映射偏移量,之后使用了4M的地址
|
||||||
|
|
||||||
// ===== 内存区域属性 =====
|
// ===== 内存区域属性 =====
|
||||||
// DMA区域
|
// DMA区域
|
||||||
#define ZONE_DMA (1 << 0)
|
#define ZONE_DMA (1 << 0)
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user