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caps registers 结构体

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fslongjin 2022-07-18 11:24:45 +08:00
parent 6ecc19cc48
commit 8b6489dac3
1 changed files with 51 additions and 2 deletions
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53
kernel/driver/usb/xhci/xhci.h
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@ -14,14 +14,63 @@
#define XHCI_CAPS_RTSOFF 0x18 // Runtime register space offset #define XHCI_CAPS_RTSOFF 0x18 // Runtime register space offset
#define XHCI_CAPS_HCCPARAMS2 0x1c // capability params 2 #define XHCI_CAPS_HCCPARAMS2 0x1c // capability params 2
struct xhci_caps_HCSPARAMS1_reg_t struct xhci_caps_HCSPARAMS1_reg_t
{ {
unsigned max_slots : 8; // 最大插槽数 unsigned max_slots : 8; // 最大插槽数
unsigned max_intrs : 11; // 最大中断数 unsigned max_intrs : 11; // 最大中断数
unsigned reserved : 5; unsigned reserved : 5;
unsigned max_ports : 8; // 最大端口数 unsigned max_ports : 8; // 最大端口数
}__attribute__((packed)); } __attribute__((packed));
struct xhci_caps_HCSPARAMS2_reg_t
{
unsigned ist : 4; // 同步调度阈值
unsigned ERST_Max : 4; // Event Ring Segment Table Max
unsigned Reserved : 13;
unsigned max_scratchpad_buf_HI5 : 5; // 草稿行buffer地址（高5bit）
unsigned spr : 1; // scratchpad restore
unsigned max_scratchpad_buf_LO5 : 5; // 草稿行buffer地址（低5bit）
} __attribute__((packed));
struct xhci_caps_HCSPARAMS3_reg_t
{
uint8_t u1_device_exit_latency; // 0~10ms
uint8_t Reserved;
uint16_t u2_device_exit_latency; // 0~2047ms
} __attribute__((packed));
struct xhci_caps_HCCPARAMS1_reg_t
{
unsigned ac64 : 1; // 64-bit addressing capability
unsigned bnc : 1; // bw negotiation capability
unsigned csz : 1; // context size
unsigned ppc : 1; // 端口电源控制
unsigned pind : 1; // port indicators
unsigned lhrc : 1; // Light HC reset capability
unsigned ltc : 1; // latency tolerance messaging capability
unsigned nss : 1; // no secondary SID support
unsigned pae : 1; // parse all event data
unsigned spc : 1; // Stopped - Short packet capability
unsigned sec : 1; // Stopped EDTLA capability
unsigned cfc : 1; // Continuous Frame ID capability
unsigned MaxPSASize : 4; // Max Primary Stream Array Size
uint16_t xECP; // xhci extended capabilities pointer
} __attribute__((packed));
struct xhci_caps_HCCPARAMS2_reg_t
{
unsigned u3c : 1; // U3 Entry Capability
unsigned cmc : 1; // ConfigEP command Max exit latency too large
unsigned fsc : 1; // Force Save Context Capability
unsigned ctc : 1; // Compliance Transition Capability
unsigned lec : 1; // large ESIT payload capability
unsigned cic : 1; // configuration information capability
unsigned Reserved : 26;
} __attribute__((packed));
/** /**