mirror of
https://github.com/DragonOS-Community/DragonOS.git
synced 2025-06-08 22:36:48 +00:00
407 lines
13 KiB
Rust
407 lines
13 KiB
Rust
use core::{any::Any, fmt::Debug};
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use alloc::sync::{Arc, Weak};
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use crate::libs::spinlock::SpinLock;
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use super::{
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irqchip::{IrqChip, IrqChipData},
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irqdomain::IrqDomain,
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msi::MsiDesc,
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HardwareIrqNumber, IrqNumber,
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};
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/// per irq chip data passed down to chip functions
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///
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/// 该结构体用于表示每个Irq的私有数据，且与具体的中断芯片绑定
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///
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/// 参考： https://code.dragonos.org.cn/xref/linux-6.1.9/include/linux/irq.h#179
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#[allow(dead_code)]
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#[derive(Debug)]
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pub struct IrqData {
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/// 中断号, 用于表示软件逻辑视角的中断号，全局唯一
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irq: IrqNumber,
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inner: SpinLock<InnerIrqData>,
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}
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impl IrqData {
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pub fn new(
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irq: IrqNumber,
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hwirq: HardwareIrqNumber,
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common_data: Arc<IrqCommonData>,
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chip: Arc<dyn IrqChip>,
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) -> Self {
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return IrqData {
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irq,
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inner: SpinLock::new(InnerIrqData {
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hwirq,
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common_data,
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chip,
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chip_data: None,
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domain: None,
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parent_data: None,
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}),
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};
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}
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pub fn irqd_set(&self, status: IrqStatus) {
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// clone是为了释放inner锁
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let common_data = self.inner.lock().common_data.clone();
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common_data.irqd_set(status);
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}
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#[allow(dead_code)]
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pub fn irqd_clear(&self, status: IrqStatus) {
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// clone是为了释放inner锁
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let common_data = self.inner.lock().common_data.clone();
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common_data.irqd_clear(status);
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}
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pub fn irq(&self) -> IrqNumber {
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self.irq
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}
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}
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#[allow(dead_code)]
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#[derive(Debug)]
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struct InnerIrqData {
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/// 硬件中断号, 用于表示在某个IrqDomain中的中断号
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hwirq: HardwareIrqNumber,
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/// 涉及的所有irqchip之间共享的数据
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common_data: Arc<IrqCommonData>,
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/// 绑定到的中断芯片
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chip: Arc<dyn IrqChip>,
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/// 中断芯片的私有数据（与当前irq相关）
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chip_data: Option<Arc<dyn IrqChipData>>,
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/// 中断域
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domain: Option<Arc<IrqDomain>>,
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/// 中断的父中断（如果具有中断域继承的话）
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parent_data: Option<Weak<IrqData>>,
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}
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/// per irq data shared by all irqchips
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///
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/// 参考 https://code.dragonos.org.cn/xref/linux-6.1.9/include/linux/irq.h#147
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#[derive(Debug)]
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pub struct IrqCommonData {
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inner: SpinLock<InnerIrqCommonData>,
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}
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impl IrqCommonData {
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pub fn new() -> Self {
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let inner = InnerIrqCommonData {
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state: IrqStatus::empty(),
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handler_data: None,
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msi_desc: None,
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};
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return IrqCommonData {
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inner: SpinLock::new(inner),
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};
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}
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pub fn irqd_set(&self, status: IrqStatus) {
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self.inner.lock_irqsave().irqd_set(status);
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}
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pub fn irqd_clear(&self, status: IrqStatus) {
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self.inner.lock_irqsave().irqd_clear(status);
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}
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}
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#[allow(dead_code)]
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#[derive(Debug)]
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struct InnerIrqCommonData {
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/// status information for irq chip functions.
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state: IrqStatus,
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/// per-IRQ data for the irq_chip methods
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handler_data: Option<Arc<dyn IrqHandlerData>>,
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msi_desc: Option<Arc<MsiDesc>>,
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// todo: affinity
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}
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impl InnerIrqCommonData {
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pub fn irqd_set(&mut self, status: IrqStatus) {
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self.state.insert(status);
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}
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pub fn irqd_clear(&mut self, status: IrqStatus) {
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self.state.remove(status);
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}
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}
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pub trait IrqHandlerData: Send + Sync + Any + Debug {}
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bitflags! {
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/// 中断线状态
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/// https://code.dragonos.org.cn/xref/linux-6.1.9/include/linux/irq.h?fi=IRQ_TYPE_PROBE#77
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pub struct IrqLineStatus: u32 {
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/// 默认，未指明类型
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const IRQ_TYPE_NONE = 0x00000000;
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/// 上升沿触发
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const IRQ_TYPE_EDGE_RISING = 0x00000001;
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/// 下降沿触发
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const IRQ_TYPE_EDGE_FALLING = 0x00000002;
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/// 上升沿和下降沿触发
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const IRQ_TYPE_EDGE_BOTH = Self::IRQ_TYPE_EDGE_RISING.bits | Self::IRQ_TYPE_EDGE_FALLING.bits;
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/// 高电平触发
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const IRQ_TYPE_LEVEL_HIGH = 0x00000004;
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/// 低电平触发
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const IRQ_TYPE_LEVEL_LOW = 0x00000008;
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/// 过滤掉电平位的掩码
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const IRQ_TYPE_LEVEL_MASK = Self::IRQ_TYPE_LEVEL_LOW.bits | Self::IRQ_TYPE_LEVEL_HIGH.bits;
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/// 上述位掩码的掩码
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const IRQ_TYPE_SENSE_MASK = 0x0000000f;
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/// 某些PICs使用此类型要求 `IrqChip::irq_set_type()` 设置硬件到一个合理的默认值
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/// （由irqdomain的map()回调使用，以便为新分配的描述符同步硬件状态和软件标志位）。
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const IRQ_TYPE_DEFAULT = Self::IRQ_TYPE_SENSE_MASK.bits;
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/// 特定于探测的过程中的特殊标志
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const IRQ_TYPE_PROBE = 0x00000010;
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/// 中断是电平类型。当上述触发位通过`IrqChip::irq_set_type()` 修改时，也会在代码中更新
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const IRQ_LEVEL = 1 << 8;
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/// 标记一个PER_CPU的中断。将保护其免受亲和性设置的影响
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const IRQ_PER_CPU = 1 << 9;
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/// 中断不能被自动探测
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const IRQ_NOPROBE = 1 << 10;
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/// 中断不能通过request_irq()请求
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const IRQ_NOREQUEST = 1 << 11;
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/// 中断在request/setup_irq()中不会自动启用
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const IRQ_NOAUTOEN = 1 << 12;
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/// 中断不能被平衡（亲和性设置）
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const IRQ_NO_BALANCING = 1 << 13;
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/// 中断可以从进程上下文中迁移
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const IRQ_MOVE_PCNTXT = 1 << 14;
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/// 中断嵌套在另一个线程中
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const IRQ_NESTED_THREAD = 1 << 15;
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/// 中断不能被线程化
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const IRQ_NOTHREAD = 1 << 16;
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/// Dev_id是一个per-CPU变量
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const IRQ_PER_CPU_DEVID = 1 << 17;
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/// 总是由另一个中断轮询。将其从错误的中断检测机制和核心侧轮询中排除
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const IRQ_IS_POLLED = 1 << 18;
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/// 禁用延迟的中断禁用 (Disable lazy irq disable)
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const IRQ_DISABLE_UNLAZY = 1 << 19;
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/// 在/proc/interrupts中不显示
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const IRQ_HIDDEN = 1 << 20;
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/// 从note_interrupt()调试中排除
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const IRQ_NO_DEBUG = 1 << 21;
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}
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}
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bitflags! {
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/// 中断状态（存储在IrqCommonData)
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///
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/// 参考： https://code.dragonos.org.cn/xref/linux-6.1.9/include/linux/irq.h#227
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pub struct IrqStatus: u32 {
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/// 触发类型位的掩码
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const IRQD_TRIGGER_MASK = 0xf;
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/// 亲和性设置待处理
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const IRQD_SETAFFINITY_PENDING = 1 << 8;
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/// 中断已激活
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const IRQD_ACTIVATED = 1 << 9;
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/// 对此IRQ禁用平衡
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const IRQD_NO_BALANCING = 1 << 10;
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/// 中断是每个CPU特定的
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const IRQD_PER_CPU = 1 << 11;
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/// 中断亲和性已设置
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const IRQD_AFFINITY_SET = 1 << 12;
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/// 中断是电平触发
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const IRQD_LEVEL = 1 << 13;
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/// 中断配置为从挂起状态唤醒
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const IRQD_WAKEUP_STATE = 1 << 14;
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/// 中断可以在进程上下文中移动
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const IRQD_MOVE_PCNTXT = 1 << 15;
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/// 中断被禁用
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const IRQD_IRQ_DISABLED = 1 << 16;
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/// 中断被屏蔽
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const IRQD_IRQ_MASKED = 1 << 17;
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/// 中断正在处理中
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const IRQD_IRQ_INPROGRESS = 1 << 18;
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/// 唤醒模式已准备就绪
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const IRQD_WAKEUP_ARMED = 1 << 19;
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/// 中断被转发到一个虚拟CPU
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const IRQD_FORWARDED_TO_VCPU = 1 << 20;
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/// 亲和性由内核自动管理
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const IRQD_AFFINITY_MANAGED = 1 << 21;
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/// 中断已启动
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const IRQD_IRQ_STARTED = 1 << 22;
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/// 由于空亲和性掩码而关闭的中断。仅适用于亲和性管理的中断。
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const IRQD_MANAGED_SHUTDOWN = 1 << 23;
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/// IRQ只允许单个亲和性目标
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const IRQD_SINGLE_TARGET = 1 << 24;
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/// 预期的触发器已设置
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const IRQD_DEFAULT_TRIGGER_SET = 1 << 25;
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/// 可以使用保留模式
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const IRQD_CAN_RESERVE = 1 << 26;
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/// Non-maskable MSI quirk for affinity change required
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const IRQD_MSI_NOMASK_QUIRK = 1 << 27;
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/// 强制要求`handle_irq_()`只能在真实的中断上下文中调用
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const IRQD_HANDLE_ENFORCE_IRQCTX = 1 << 28;
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/// 激活时设置亲和性。在禁用时不要调用irq_chip::irq_set_affinity()。
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const IRQD_AFFINITY_ON_ACTIVATE = 1 << 29;
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/// 如果irqpm具有标志 IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND，则在挂起时中断被启用。
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const IRQD_IRQ_ENABLED_ON_SUSPEND = 1 << 30;
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}
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}
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#[allow(dead_code)]
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impl IrqStatus {
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pub const fn is_set_affinity_pending(&self) -> bool {
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self.contains(Self::IRQD_SETAFFINITY_PENDING)
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}
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pub const fn is_per_cpu(&self) -> bool {
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self.contains(Self::IRQD_PER_CPU)
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}
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pub const fn can_balance(&self) -> bool {
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!((self.bits & (Self::IRQD_PER_CPU.bits | Self::IRQD_NO_BALANCING.bits)) != 0)
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}
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pub const fn affinity_was_set(&self) -> bool {
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self.contains(Self::IRQD_AFFINITY_SET)
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}
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pub fn mark_affinity_set(&mut self) {
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self.insert(Self::IRQD_AFFINITY_SET);
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}
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pub const fn trigger_type_was_set(&self) -> bool {
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self.contains(Self::IRQD_DEFAULT_TRIGGER_SET)
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}
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pub fn mark_trigger_type_set(&mut self) {
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self.insert(Self::IRQD_DEFAULT_TRIGGER_SET);
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}
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pub const fn trigger_type(&self) -> IrqLineStatus {
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IrqLineStatus::from_bits_truncate(self.bits & Self::IRQD_TRIGGER_MASK.bits)
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}
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/// Must only be called inside irq_chip.irq_set_type() functions or
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/// from the DT/ACPI setup code.
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pub const fn set_trigger_type(&mut self, trigger: IrqLineStatus) {
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self.bits &= !Self::IRQD_TRIGGER_MASK.bits;
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self.bits |= trigger.bits & Self::IRQD_TRIGGER_MASK.bits;
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self.bits |= Self::IRQD_DEFAULT_TRIGGER_SET.bits;
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}
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pub const fn is_level_type(&self) -> bool {
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self.contains(Self::IRQD_LEVEL)
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}
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/// Must only be called of irqchip.irq_set_affinity() or low level
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/// hierarchy domain allocation functions.
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pub fn set_single_target(&mut self) {
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self.insert(Self::IRQD_SINGLE_TARGET);
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}
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pub const fn is_single_target(&self) -> bool {
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self.contains(Self::IRQD_SINGLE_TARGET)
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}
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pub fn set_handle_enforce_irqctx(&mut self) {
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self.insert(Self::IRQD_HANDLE_ENFORCE_IRQCTX);
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}
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pub const fn is_handle_enforce_irqctx(&self) -> bool {
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self.contains(Self::IRQD_HANDLE_ENFORCE_IRQCTX)
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}
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pub const fn is_enabled_on_suspend(&self) -> bool {
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self.contains(Self::IRQD_IRQ_ENABLED_ON_SUSPEND)
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}
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pub const fn is_wakeup_set(&self) -> bool {
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self.contains(Self::IRQD_WAKEUP_STATE)
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}
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pub const fn can_move_in_process_context(&self) -> bool {
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self.contains(Self::IRQD_MOVE_PCNTXT)
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}
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pub const fn is_irq_disabled(&self) -> bool {
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self.contains(Self::IRQD_IRQ_DISABLED)
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}
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pub const fn is_irq_masked(&self) -> bool {
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self.contains(Self::IRQD_IRQ_MASKED)
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}
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pub const fn is_irq_in_progress(&self) -> bool {
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self.contains(Self::IRQD_IRQ_INPROGRESS)
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}
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pub const fn is_wakeup_armed(&self) -> bool {
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self.contains(Self::IRQD_WAKEUP_ARMED)
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}
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pub const fn is_forwarded_to_vcpu(&self) -> bool {
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self.contains(Self::IRQD_FORWARDED_TO_VCPU)
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}
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pub fn set_forwarded_to_vcpu(&mut self) {
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self.insert(Self::IRQD_FORWARDED_TO_VCPU);
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}
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pub const fn is_affinity_managed(&self) -> bool {
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self.contains(Self::IRQD_AFFINITY_MANAGED)
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}
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pub const fn is_activated(&self) -> bool {
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self.contains(Self::IRQD_ACTIVATED)
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}
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pub fn set_activated(&mut self) {
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self.insert(Self::IRQD_ACTIVATED);
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}
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pub fn clear_activated(&mut self) {
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self.remove(Self::IRQD_ACTIVATED);
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}
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pub const fn is_started(&self) -> bool {
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self.contains(Self::IRQD_IRQ_STARTED)
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}
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pub const fn is_managed_and_shutdown(&self) -> bool {
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self.contains(Self::IRQD_MANAGED_SHUTDOWN)
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}
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pub fn set_can_reserve(&mut self) {
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self.insert(Self::IRQD_CAN_RESERVE);
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}
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pub const fn can_reserve(&self) -> bool {
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self.contains(Self::IRQD_CAN_RESERVE)
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}
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pub fn clear_can_reserve(&mut self) {
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self.remove(Self::IRQD_CAN_RESERVE);
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}
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pub fn set_msi_nomask_quirk(&mut self) {
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self.insert(Self::IRQD_MSI_NOMASK_QUIRK);
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}
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pub fn clear_msi_nomask_quirk(&mut self) {
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self.remove(Self::IRQD_MSI_NOMASK_QUIRK);
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}
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pub const fn is_msi_nomask_quirk(&self) -> bool {
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self.contains(Self::IRQD_MSI_NOMASK_QUIRK)
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}
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pub fn set_affinity_on_activate(&mut self) {
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self.insert(Self::IRQD_AFFINITY_ON_ACTIVATE);
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}
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pub const fn is_affinity_on_activate(&self) -> bool {
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self.contains(Self::IRQD_AFFINITY_ON_ACTIVATE)
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}
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}
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