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103 lines
3.6 KiB
C
103 lines
3.6 KiB
C
#pragma once
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#include <driver/usb/usb.h>
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#include <driver/pci/pci.h>
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#define MAX_XHCI_HOST_CONTROLLERS 8
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// xhci Capability Registers offset
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#define XHCI_CAPS_CAPLENGTH 0x00 // Cap 寄存器组的长度
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#define XHCI_CAPS_RESERVED 0x01
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#define XHCI_CAPS_HCIVERSION 0x02 // 接口版本号
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#define XHCI_CAPS_HCSPARAMS1 0x04
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#define XHCI_CAPS_HCSPARAMS2 0x08
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#define XHCI_CAPS_HCSPARAMS3 0x0c
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#define XHCI_CAPS_HCCPARAMS1 0x10 // capability params 1
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#define XHCI_CAPS_DBOFF 0x14 // Doorbell offset
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#define XHCI_CAPS_RTSOFF 0x18 // Runtime register space offset
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#define XHCI_CAPS_HCCPARAMS2 0x1c // capability params 2
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struct xhci_caps_HCSPARAMS1_reg_t
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{
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unsigned max_slots : 8; // 最大插槽数
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unsigned max_intrs : 11; // 最大中断数
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unsigned reserved : 5;
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unsigned max_ports : 8; // 最大端口数
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} __attribute__((packed));
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struct xhci_caps_HCSPARAMS2_reg_t
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{
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unsigned ist : 4; // 同步调度阈值
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unsigned ERST_Max : 4; // Event Ring Segment Table Max
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unsigned Reserved : 13;
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unsigned max_scratchpad_buf_HI5 : 5; // 草稿行buffer地址（高5bit）
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unsigned spr : 1; // scratchpad restore
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unsigned max_scratchpad_buf_LO5 : 5; // 草稿行buffer地址（低5bit）
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} __attribute__((packed));
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struct xhci_caps_HCSPARAMS3_reg_t
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{
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uint8_t u1_device_exit_latency; // 0~10ms
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uint8_t Reserved;
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uint16_t u2_device_exit_latency; // 0~2047ms
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} __attribute__((packed));
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struct xhci_caps_HCCPARAMS1_reg_t
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{
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unsigned ac64 : 1; // 64-bit addressing capability
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unsigned bnc : 1; // bw negotiation capability
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unsigned csz : 1; // context size
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unsigned ppc : 1; // 端口电源控制
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unsigned pind : 1; // port indicators
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unsigned lhrc : 1; // Light HC reset capability
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unsigned ltc : 1; // latency tolerance messaging capability
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unsigned nss : 1; // no secondary SID support
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unsigned pae : 1; // parse all event data
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unsigned spc : 1; // Stopped - Short packet capability
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unsigned sec : 1; // Stopped EDTLA capability
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unsigned cfc : 1; // Continuous Frame ID capability
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unsigned MaxPSASize : 4; // Max Primary Stream Array Size
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uint16_t xECP; // xhci extended capabilities pointer
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} __attribute__((packed));
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struct xhci_caps_HCCPARAMS2_reg_t
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{
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unsigned u3c : 1; // U3 Entry Capability
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unsigned cmc : 1; // ConfigEP command Max exit latency too large
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unsigned fsc : 1; // Force Save Context Capability
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unsigned ctc : 1; // Compliance Transition Capability
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unsigned lec : 1; // large ESIT payload capability
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unsigned cic : 1; // configuration information capability
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unsigned Reserved : 26;
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} __attribute__((packed));
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/**
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* @brief xhci端口信息
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*
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*/
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struct xhci_port_info_t
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{
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uint8_t flags; // port flags
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uint8_t paired_port_num; // 与当前端口所配对的另一个端口（相同物理接口的不同速度的port）
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uint8_t offset; // offset of this port within this protocal
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uint8_t reserved;
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} __attribute__((packed));
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struct xhci_host_controller_t
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{
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struct pci_device_structure_general_device_t *pci_dev_hdr; // 指向pci header结构体的指针
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int controller_id; // 操作系统给controller的编号
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uint64_t vbase; // 虚拟地址base（bar0映射到的虚拟地址）
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struct xhci_port_info_t *ports; // 指向端口信息数组的指针
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};
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/**
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* @brief 初始化xhci控制器
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*
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* @param header 指定控制器的pci device头部
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*/
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void xhci_init(struct pci_device_structure_general_device_t *header); |