mirror of
https://github.com/DragonOS-Community/DragonOS.git
synced 2025-06-09 15:26:47 +00:00
766 lines
27 KiB
C
766 lines
27 KiB
C
#include "xhci.h"
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#include <common/kprint.h>
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#include <debug/bug.h>
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#include <process/spinlock.h>
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#include <mm/mm.h>
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#include <mm/slab.h>
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#include <debug/traceback/traceback.h>
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#include <common/time.h>
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#include <exception/irq.h>
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#include <driver/interrupt/apic/apic.h>
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spinlock_t xhci_controller_init_lock; // xhci控制器初始化锁(在usb_init中被初始化)
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static int xhci_ctrl_count = 0; // xhci控制器计数
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static struct xhci_host_controller_t xhci_hc[XHCI_MAX_HOST_CONTROLLERS] = {0};
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void xhci_hc_irq_enable(uint64_t irq_num);
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void xhci_hc_irq_disable(uint64_t irq_num);
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uint64_t xhci_hc_irq_install(uint64_t irq_num, void *arg);
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void xhci_hc_irq_uninstall(uint64_t irq_num);
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hardware_intr_controller xhci_hc_intr_controller =
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{
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.enable = xhci_hc_irq_enable,
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.disable = xhci_hc_irq_disable,
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.install = xhci_hc_irq_install,
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.uninstall = xhci_hc_irq_uninstall,
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.ack = apic_local_apic_edge_ack,
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};
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/*
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注意！！！
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尽管采用MMI/O的方式访问寄存器，但是对于指定大小的寄存器，
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在发起读请求的时候，只能从寄存器的起始地址位置开始读取。
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例子：不能在一个32bit的寄存器中的偏移量8的位置开始读取1个字节
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这种情况下，我们必须从32bit的寄存器的0地址处开始读取32bit，然后通过移位的方式得到其中的字节。
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*/
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#define xhci_read_cap_reg8(id, offset) (*(uint8_t *)(xhci_hc[id].vbase + offset))
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#define xhci_get_ptr_cap_reg8(id, offset) ((uint8_t *)(xhci_hc[id].vbase + offset))
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#define xhci_write_cap_reg8(id, offset, value) (*(uint8_t *)(xhci_hc[id].vbase + offset) = (uint8_t)value)
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#define xhci_read_cap_reg32(id, offset) (*(uint32_t *)(xhci_hc[id].vbase + offset))
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#define xhci_get_ptr_cap_reg32(id, offset) ((uint32_t *)(xhci_hc[id].vbase + offset))
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#define xhci_write_cap_reg32(id, offset, value) (*(uint32_t *)(xhci_hc[id].vbase + offset) = (uint32_t)value)
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#define xhci_read_cap_reg64(id, offset) (*(uint64_t *)(xhci_hc[id].vbase + offset))
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#define xhci_get_ptr_reg64(id, offset) ((uint64_t *)(xhci_hc[id].vbase + offset))
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#define xhci_write_cap_reg64(id, offset, value) (*(uint64_t *)(xhci_hc[id].vbase + offset) = (uint64_t)value)
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#define xhci_read_op_reg8(id, offset) (*(uint8_t *)(xhci_hc[id].vbase_op + offset))
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#define xhci_get_ptr_op_reg8(id, offset) ((uint8_t *)(xhci_hc[id].vbase_op + offset))
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#define xhci_write_op_reg8(id, offset, value) (*(uint8_t *)(xhci_hc[id].vbase_op + offset) = (uint8_t)value)
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#define xhci_read_op_reg32(id, offset) (*(uint32_t *)(xhci_hc[id].vbase_op + offset))
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#define xhci_get_ptr_op_reg32(id, offset) ((uint32_t *)(xhci_hc[id].vbase_op + offset))
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#define xhci_write_op_reg32(id, offset, value) (*(uint32_t *)(xhci_hc[id].vbase_op + offset) = (uint32_t)value)
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#define xhci_read_op_reg64(id, offset) (*(uint64_t *)(xhci_hc[id].vbase_op + offset))
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#define xhci_get_ptr_op_reg64(id, offset) ((uint64_t *)(xhci_hc[id].vbase_op + offset))
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#define xhci_write_op_reg64(id, offset, value) (*(uint64_t *)(xhci_hc[id].vbase_op + offset) = (uint64_t)value)
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/**
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* @brief 计算中断寄存器组虚拟地址
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* @param id 主机控制器id
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* @param num xhci中断寄存器组号
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*/
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#define xhci_calc_intr_vaddr(id, num) (xhci_hc[id].vbase + xhci_hc[id].rts_offset + XHCI_RT_IR0 + num * XHCI_IR_SIZE)
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/**
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* @brief 读取/写入中断寄存器
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* @param id 主机控制器id
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* @param num xhci中断寄存器组号
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* @param intr_offset 寄存器在当前寄存器组中的偏移量
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*/
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#define xhci_read_intr_reg32(id, num, intr_offset) (*(uint32_t *)(xhci_calc_intr_vaddr(id, num) + intr_offset))
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#define xhci_write_intr_reg32(id, num, intr_offset, value) (*(uint32_t *)(xhci_calc_intr_vaddr(id, num) + intr_offset) = value)
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#define xhci_read_intr_reg64(id, num, intr_offset) (*(uint64_t *)(xhci_calc_intr_vaddr(id, num) + intr_offset))
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#define xhci_write_intr_reg64(id, num, intr_offset, value) (*(uint64_t *)(xhci_calc_intr_vaddr(id, num) + intr_offset) = value)
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#define xhci_is_aligned64(addr) ((addr & 0x3f) == 0) // 是否64bytes对齐
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/**
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* @brief 判断端口信息
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* @param cid 主机控制器id
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* @param pid 端口id
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*/
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#define XHCI_PORT_IS_USB2(cid, pid) ((xhci_hc[cid].ports[pid].flags & XHCI_PROTOCOL_INFO) == XHCI_PROTOCOL_USB2)
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#define XHCI_PORT_IS_USB3(cid, pid) ((xhci_hc[cid].ports[pid].flags & XHCI_PROTOCOL_INFO) == XHCI_PROTOCOL_USB3)
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#define XHCI_PORT_IS_USB2_HSO(cid, pid) ((xhci_hc[cid].ports[pid].flags & XHCI_PROTOCOL_HSO) == XHCI_PROTOCOL_HSO)
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#define XHCI_PORT_HAS_PAIR(cid, pid) ((xhci_hc[cid].ports[pid].flags & XHCI_PROTOCOL_HAS_PAIR) == XHCI_PROTOCOL_HAS_PAIR)
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#define XHCI_PORT_IS_ACTIVE(cid, pid) ((xhci_hc[cid].ports[pid].flags & XHCI_PROTOCOL_ACTIVE) == XHCI_PROTOCOL_ACTIVE)
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/**
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* @brief 设置link TRB的命令（dword3）
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*
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*/
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#define xhci_TRB_set_link_cmd(trb_vaddr) \
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do \
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{ \
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struct xhci_TRB_normal_t *ptr = (struct xhci_TRB_normal_t *)trb_vaddr; \
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ptr->TRB_type = TRB_TYPE_LINK; \
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ptr->ioc = 0; \
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ptr->chain = 0; \
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ptr->ent = 0; \
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ptr->cycle = 1; \
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} while (0)
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#define FAIL_ON(value, to) \
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do \
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{ \
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if (unlikely(value != 0)) \
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goto to; \
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} while (0)
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// Common TRB types
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enum
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{
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TRB_TYPE_NORMAL = 1,
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TRB_TYPE_SETUP_STAGE,
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TRB_TYPE_DATA_STAGE,
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TRB_TYPE_STATUS_STAGE,
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TRB_TYPE_ISOCH,
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TRB_TYPE_LINK,
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TRB_TYPE_EVENT_DATA,
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TRB_TYPE_NO_OP,
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TRB_TYPE_ENABLE_SLOT,
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TRB_TYPE_DISABLE_SLOT = 10,
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TRB_TYPE_ADDRESS_DEVICE = 11,
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TRB_TYPE_CONFIG_EP,
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TRB_TYPE_EVALUATE_CONTEXT,
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TRB_TYPE_RESET_EP,
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TRB_TYPE_STOP_EP = 15,
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TRB_TYPE_SET_TR_DEQUEUE,
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TRB_TYPE_RESET_DEVICE,
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TRB_TYPE_FORCE_EVENT,
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TRB_TYPE_DEG_BANDWIDTH,
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TRB_TYPE_SET_LAT_TOLERANCE = 20,
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TRB_TYPE_GET_PORT_BAND = 21,
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TRB_TYPE_FORCE_HEADER,
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TRB_TYPE_NO_OP_CMD, // 24 - 31 = reserved
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TRB_TYPE_TRANS_EVENT = 32,
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TRB_TYPE_COMMAND_COMPLETION,
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TRB_TYPE_PORT_STATUS_CHANGE,
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TRB_TYPE_BANDWIDTH_REQUEST,
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TRB_TYPE_DOORBELL_EVENT,
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TRB_TYPE_HOST_CONTROLLER_EVENT = 37,
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TRB_TYPE_DEVICE_NOTIFICATION,
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TRB_TYPE_MFINDEX_WRAP,
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// 40 - 47 = reserved
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// 48 - 63 = Vendor Defined
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};
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/**
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* @brief 在controller数组之中寻找可用插槽
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*
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* 注意：该函数只能被获得init锁的进程所调用
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* @return int 可用id(无空位时返回-1)
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*/
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static int xhci_hc_find_available_id()
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{
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if (unlikely(xhci_ctrl_count >= XHCI_MAX_HOST_CONTROLLERS))
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return -1;
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for (int i = 0; i < XHCI_MAX_HOST_CONTROLLERS; ++i)
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{
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if (xhci_hc[i].pci_dev_hdr == NULL)
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return i;
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}
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return -1;
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}
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/**
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* @brief 停止xhci主机控制器
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*
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* @param id 主机控制器id
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* @return int
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*/
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static int xhci_hc_stop(int id)
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{
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// 判断是否已经停止
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if (unlikely((xhci_read_op_reg32(id, XHCI_OPS_USBSTS) & (1 << 0)) == 1))
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return 0;
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xhci_write_op_reg32(id, XHCI_OPS_USBCMD, 0x00000000);
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char timeout = 17;
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while ((xhci_read_op_reg32(id, XHCI_OPS_USBSTS) & (1 << 0)) == 0)
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{
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usleep(1000);
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if (--timeout == 0)
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return -ETIMEDOUT;
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}
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return 0;
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}
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/**
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* @brief reset xHCI主机控制器
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*
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* @param id 主机控制器id
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* @return int
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*/
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static int xhci_hc_reset(int id)
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{
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int retval = 0;
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// 判断HCHalted是否置位
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if ((xhci_read_op_reg32(id, XHCI_OPS_USBSTS) & (1 << 0)) == 0)
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{
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// 未置位，需要先尝试停止usb主机控制器
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retval = xhci_hc_stop(id);
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if (unlikely(retval))
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return retval;
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}
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int timeout = 500; // wait 500ms
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// reset
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xhci_write_op_reg32(id, XHCI_OPS_USBCMD, (1 << 1));
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while (xhci_read_op_reg32(id, XHCI_OPS_USBCMD) & (1 << 1))
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{
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usleep(1000);
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if (--timeout == 0)
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return -ETIMEDOUT;
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}
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// kdebug("reset done!, timeout=%d", timeout);
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return retval;
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}
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/**
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* @brief 停止指定xhci控制器的legacy support
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*
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* @param id 控制器id
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* @return int
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*/
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static int xhci_hc_stop_legacy(int id)
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{
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uint64_t current_offset = xhci_hc[id].ext_caps_off;
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do
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{
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// 判断当前entry是否为legacy support entry
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if (xhci_read_cap_reg8(id, current_offset) == XHCI_XECP_ID_LEGACY)
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{
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// 接管控制权
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xhci_write_cap_reg32(id, current_offset, xhci_read_cap_reg32(id, current_offset) | XHCI_XECP_LEGACY_OS_OWNED);
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// 等待响应完成
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int timeout = XHCI_XECP_LEGACY_TIMEOUT;
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while ((xhci_read_cap_reg32(id, current_offset) & XHCI_XECP_LEGACY_OWNING_MASK) != XHCI_XECP_LEGACY_OS_OWNED)
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{
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usleep(1000);
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if (--timeout == 0)
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{
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kerror("The BIOS doesn't stop legacy support.");
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return -ETIMEDOUT;
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}
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}
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// 处理完成
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return 0;
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}
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// 读取下一个entry的偏移增加量
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int next_off = ((xhci_read_cap_reg32(id, current_offset) & 0xff00) >> 8) << 2;
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// 将指针跳转到下一个entry
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current_offset = next_off ? (current_offset + next_off) : 0;
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} while (current_offset);
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// 当前controller不存在legacy支持，也问题不大，不影响
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return 0;
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}
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/**
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* @brief 启用指定xhci控制器的调度
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*
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* @param id 控制器id
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* @return int
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*/
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static int xhci_hc_start_sched(int id)
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{
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xhci_write_op_reg32(id, XHCI_OPS_USBCMD, (1 << 0) | (1 >> 2) | (1 << 3));
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}
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/**
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* @brief 停止指定xhci控制器的调度
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*
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* @param id 控制器id
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* @return int
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*/
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static int xhci_hc_stop_sched(int id)
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{
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xhci_write_op_reg32(id, XHCI_OPS_USBCMD, 0x00);
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}
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/**
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* @brief
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*
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* @return uint32_t
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*/
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/**
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* @brief 在Ex capability list中寻找符合指定的协议号的寄存器offset、count、flag信息
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*
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* @param id 主机控制器id
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* @param list_off 列表项位置距离控制器虚拟基地址的偏移量
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* @param version 要寻找的端口版本号（2或3）
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* @param offset 返回的 Compatible Port Offset
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* @param count 返回的 Compatible Port Count
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* @param protocol_flag 返回的与协议相关的flag
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* @return uint32_t 下一个列表项的偏移量
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*/
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static uint32_t xhci_hc_get_protocol_offset(int id, uint32_t list_off, const int version, uint32_t *offset, uint32_t *count, uint16_t *protocol_flag)
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{
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if (count)
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*count = 0;
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do
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{
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uint32_t dw0 = xhci_read_cap_reg32(id, list_off);
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uint32_t next_list_off = (dw0 >> 8) & 0xff;
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next_list_off = next_list_off ? (list_off + (next_list_off << 2)) : 0;
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if ((dw0 & 0xff) == XHCI_XECP_ID_PROTOCOL && ((dw0 & 0xff000000) >> 24) == version)
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{
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uint32_t dw2 = xhci_read_cap_reg32(id, list_off + 8);
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if (offset != NULL)
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*offset = (uint32_t)(dw2 & 0xff);
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if (count != NULL)
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*count = (uint32_t)((dw2 & 0xff00) >> 8);
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if (protocol_flag != NULL)
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*protocol_flag = (uint16_t)((dw2 >> 16) & 0xffff);
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return next_list_off;
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}
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list_off = next_list_off;
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} while (list_off);
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return 0;
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}
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/**
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* @brief 配对xhci主机控制器的usb2、usb3端口
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*
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* @param id 主机控制器id
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* @return int 返回码
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*/
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static int xhci_hc_pair_ports(int id)
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{
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struct xhci_caps_HCSPARAMS1_reg_t hcs1;
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memcpy(&hcs1, xhci_get_ptr_cap_reg32(id, XHCI_CAPS_HCSPARAMS1), sizeof(struct xhci_caps_HCSPARAMS1_reg_t));
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// 从hcs1获取端口数量
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xhci_hc[id].port_num = hcs1.max_ports;
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// 找到所有的端口并标记其端口信息
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xhci_hc[id].port_num_u2 = 0;
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xhci_hc[id].port_num_u3 = 0;
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uint32_t next_off = xhci_hc[id].ext_caps_off;
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uint32_t offset, cnt;
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uint16_t protocol_flags;
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// 寻找所有的usb2端口
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while (next_off)
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{
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next_off = xhci_hc_get_protocol_offset(id, next_off, 2, &offset, &cnt, &protocol_flags);
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if (cnt)
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{
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for (int i = 0; i < cnt; ++i)
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{
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xhci_hc[id].ports[offset + i].offset = ++xhci_hc[id].port_num_u2;
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xhci_hc[id].ports[offset + i].flags = XHCI_PROTOCOL_USB2;
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// usb2 high speed only
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if (protocol_flags & 2)
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xhci_hc[id].ports[offset + i].flags |= XHCI_PROTOCOL_HSO;
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}
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}
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}
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// 寻找所有的usb3端口
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next_off = xhci_hc[id].ext_caps_off;
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while (next_off)
|
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{
|
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next_off = xhci_hc_get_protocol_offset(id, next_off, 3, &offset, &cnt, &protocol_flags);
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|
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if (cnt)
|
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{
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for (int i = 0; i < cnt; ++i)
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{
|
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xhci_hc[id].ports[offset + i].offset = ++xhci_hc[id].port_num_u3;
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xhci_hc[id].ports[offset + i].flags = XHCI_PROTOCOL_USB3;
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}
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}
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}
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// 将对应的USB2端口和USB3端口进行配对
|
||
for (int i = 1; i <= xhci_hc[id].port_num; ++i)
|
||
{
|
||
for (int j = i; j <= xhci_hc[id].port_num; ++j)
|
||
{
|
||
if (unlikely(i == j))
|
||
continue;
|
||
|
||
if ((xhci_hc[id].ports[i].offset == xhci_hc[id].ports[j].offset) &&
|
||
((xhci_hc[id].ports[i].flags & XHCI_PROTOCOL_INFO) != (xhci_hc[id].ports[j].flags & XHCI_PROTOCOL_INFO)))
|
||
{
|
||
xhci_hc[id].ports[i].paired_port_num = j;
|
||
xhci_hc[id].ports[i].flags |= XHCI_PROTOCOL_HAS_PAIR;
|
||
|
||
xhci_hc[id].ports[j].paired_port_num = i;
|
||
xhci_hc[id].ports[j].flags |= XHCI_PROTOCOL_HAS_PAIR;
|
||
}
|
||
}
|
||
}
|
||
|
||
// 标记所有的usb3端口为激活状态
|
||
for (int i = 1; i <= xhci_hc[id].port_num; ++i)
|
||
{
|
||
if (XHCI_PORT_IS_USB3(id, i) ||
|
||
(XHCI_PORT_IS_USB2(id, i) && (!XHCI_PORT_HAS_PAIR(id, i))))
|
||
xhci_hc[id].ports[i].flags |= XHCI_PROTOCOL_ACTIVE;
|
||
}
|
||
kinfo("Found %d ports on root hub, usb2 ports:%d, usb3 ports:%d", xhci_hc[id].port_num, xhci_hc[id].port_num_u2, xhci_hc[id].port_num_u3);
|
||
|
||
/*
|
||
// 打印配对结果
|
||
for (int i = 1; i <= xhci_hc[id].port_num; ++i)
|
||
{
|
||
if (XHCI_PORT_IS_USB3(id, i))
|
||
{
|
||
kdebug("USB3 port %d, offset=%d, pair with usb2 port %d, current port is %s", i, xhci_hc[id].ports[i].offset,
|
||
xhci_hc[id].ports[i].paired_port_num, XHCI_PORT_IS_ACTIVE(id, i) ? "active" : "inactive");
|
||
}
|
||
else if (XHCI_PORT_IS_USB2(id, i) && (!XHCI_PORT_HAS_PAIR(id, i))) // 单独的2.0接口
|
||
{
|
||
kdebug("Stand alone USB2 port %d, offset=%d, current port is %s", i, xhci_hc[id].ports[i].offset,
|
||
XHCI_PORT_IS_ACTIVE(id, i) ? "active" : "inactive");
|
||
}
|
||
else if (XHCI_PORT_IS_USB2(id, i))
|
||
{
|
||
kdebug("USB2 port %d, offset=%d, current port is %s, has pair=%s", i, xhci_hc[id].ports[i].offset,
|
||
XHCI_PORT_IS_ACTIVE(id, i) ? "active" : "inactive", XHCI_PORT_HAS_PAIR(id, i)?"true":"false");
|
||
}
|
||
}
|
||
*/
|
||
|
||
return 0;
|
||
}
|
||
|
||
/**
|
||
* @brief 创建ring，并将最后一个trb指向头一个trb
|
||
*
|
||
* @param trbs 要创建的trb数量
|
||
* @return uint64_t trb数组的起始虚拟地址
|
||
*/
|
||
static uint64_t xhci_create_ring(int trbs)
|
||
{
|
||
int total_size = trbs * sizeof(struct xhci_TRB_t);
|
||
const uint64_t vaddr = (uint64_t)kmalloc(total_size, 0);
|
||
memset((void *)vaddr, 0, total_size);
|
||
|
||
// 设置最后一个trb为link trb
|
||
xhci_TRB_set_link_cmd(vaddr + total_size - sizeof(sizeof(struct xhci_TRB_t)));
|
||
|
||
return vaddr;
|
||
}
|
||
|
||
/**
|
||
* @brief 创建新的event ring table和对应的ring segment
|
||
*
|
||
* @param trbs 包含的trb的数量
|
||
* @param ret_ring_addr 返回的第一个event ring segment的基地址（虚拟）
|
||
* @return uint64_t trb table的虚拟地址
|
||
*/
|
||
static uint64_t xhci_create_event_ring(int trbs, uint64_t *ret_ring_addr)
|
||
{
|
||
const uint64_t table_vaddr = (const uint64_t)kmalloc(64, 0); // table支持8个segment
|
||
if (unlikely(table_vaddr == NULL))
|
||
return -ENOMEM;
|
||
memset((void *)table_vaddr, 0, 64);
|
||
|
||
// 暂时只创建1个segment
|
||
const uint64_t seg_vaddr = (const uint64_t)kmalloc(trbs * sizeof(struct xhci_TRB_t), 0);
|
||
|
||
if (unlikely(seg_vaddr == NULL))
|
||
return -ENOMEM;
|
||
|
||
memset((void *)seg_vaddr, 0, trbs * sizeof(struct xhci_TRB_t));
|
||
|
||
// 将segment地址和大小写入table
|
||
*(uint64_t *)(table_vaddr) = virt_2_phys(seg_vaddr);
|
||
*(uint64_t *)(table_vaddr + 8) = trbs;
|
||
|
||
*ret_ring_addr = seg_vaddr;
|
||
return table_vaddr;
|
||
}
|
||
|
||
void xhci_hc_irq_enable(uint64_t irq_num)
|
||
{
|
||
int cid = xhci_find_hcid_by_irq_num(irq_num);
|
||
if (WARN_ON(cid == -1))
|
||
return;
|
||
pci_start_msi(xhci_hc[cid].pci_dev_hdr);
|
||
|
||
xhci_hc_start_sched(cid);
|
||
}
|
||
|
||
void xhci_hc_irq_disable(uint64_t irq_num)
|
||
{
|
||
int cid = xhci_find_hcid_by_irq_num(irq_num);
|
||
if (WARN_ON(cid == -1))
|
||
return;
|
||
|
||
xhci_hc_stop_sched(cid);
|
||
pci_disable_msi(xhci_hc[cid].pci_dev_hdr);
|
||
}
|
||
|
||
uint64_t xhci_hc_irq_install(uint64_t irq_num, void *arg)
|
||
{
|
||
int cid = xhci_find_hcid_by_irq_num(irq_num);
|
||
if (WARN_ON(cid == -1))
|
||
return -EINVAL;
|
||
|
||
struct xhci_hc_irq_install_info_t *info = (struct xhci_hc_irq_install_info_t *)arg;
|
||
|
||
pci_enable_msi(xhci_hc[cid].pci_dev_hdr, irq_num, info->processor, info->edge_trigger, info->assert);
|
||
return 0;
|
||
}
|
||
|
||
void xhci_hc_irq_uninstall(uint64_t irq_num)
|
||
{
|
||
// todo
|
||
int cid = xhci_find_hcid_by_irq_num(irq_num);
|
||
if (WARN_ON(cid == -1))
|
||
return;
|
||
xhci_hc_stop(cid);
|
||
}
|
||
/**
|
||
* @brief xhci主机控制器的中断处理函数
|
||
*
|
||
* @param irq_num 中断向量号
|
||
* @param cid 控制器号
|
||
* @param regs 寄存器值
|
||
*/
|
||
void xhci_hc_irq_handler(uint64_t irq_num, uint64_t cid, struct pt_regs *regs)
|
||
{
|
||
// todo: handle irq
|
||
kdebug("USB irq received.");
|
||
}
|
||
|
||
/**
|
||
* @brief 初始化xhci主机控制器的中断控制
|
||
*
|
||
* @param id 主机控制器id
|
||
* @return int 返回码
|
||
*/
|
||
static int xhci_hc_init_intr(int id)
|
||
{
|
||
uint64_t retval = 0;
|
||
|
||
struct xhci_caps_HCSPARAMS1_reg_t hcs1;
|
||
struct xhci_caps_HCSPARAMS2_reg_t hcs2;
|
||
memcpy(&hcs1, xhci_get_ptr_cap_reg32(id, XHCI_CAPS_HCSPARAMS1), sizeof(struct xhci_caps_HCSPARAMS1_reg_t));
|
||
memcpy(&hcs2, xhci_get_ptr_cap_reg32(id, XHCI_CAPS_HCSPARAMS2), sizeof(struct xhci_caps_HCSPARAMS2_reg_t));
|
||
|
||
uint32_t max_segs = (1 << (uint32_t)(hcs2.ERST_Max));
|
||
uint32_t max_interrupters = hcs1.max_intrs;
|
||
|
||
// 创建 event ring
|
||
retval = xhci_create_event_ring(4096, &xhci_hc[id].event_ring_vaddr);
|
||
if (unlikely((int64_t)(retval) == -ENOMEM))
|
||
return -ENOMEM;
|
||
xhci_hc[id].event_ring_table_vaddr = retval;
|
||
retval = 0;
|
||
|
||
xhci_hc[id].current_event_ring_cycle = 1;
|
||
|
||
// 写入第0个中断寄存器组
|
||
xhci_write_intr_reg32(id, 0, XHCI_IR_MAN, 0x3); // 使能中断并清除pending位（这个pending位是写入1就清0的）
|
||
xhci_write_intr_reg32(id, 0, XHCI_IR_MOD, 0); // 关闭中断管制
|
||
xhci_write_intr_reg32(id, 0, XHCI_IR_TABLE_SIZE, 1); // 当前只有1个segment
|
||
xhci_write_intr_reg64(id, 0, XHCI_IR_DEQUEUE, virt_2_phys(xhci_hc[id].event_ring_vaddr) | (1 << 3)); // 写入dequeue寄存器，并清除busy位（写1就会清除）
|
||
xhci_write_intr_reg64(id, 0, XHCI_IR_TABLE_ADDR, virt_2_phys(xhci_hc[id].event_ring_table_vaddr)); // 写入table地址
|
||
|
||
// 清除状态位
|
||
struct xhci_ops_usbsts_reg_t sts = {0};
|
||
sts.hse = 1;
|
||
sts.eint = 1;
|
||
sts.pcd = 1;
|
||
sts.sre = 1;
|
||
kdebug("new_sts=%#010lx", *(uint32_t *)(&sts));
|
||
xhci_write_op_reg32(id, XHCI_OPS_USBSTS, *(uint32_t *)(&sts));
|
||
|
||
// 开启usb中断
|
||
// 注册中断处理程序
|
||
struct xhci_hc_irq_install_info_t install_info;
|
||
install_info.assert = 0;
|
||
install_info.edge_trigger = 1;
|
||
install_info.processor = 0; // 投递到bsp
|
||
|
||
char *buf = (char *)kmalloc(16, 0);
|
||
memset(buf, 0, 16);
|
||
sprintk(buf, "xHCI HC%d", id);
|
||
irq_register(xhci_controller_irq_num[id], &install_info, &xhci_hc_irq_handler, id, &xhci_hc_intr_controller, buf);
|
||
kfree(buf);
|
||
|
||
kdebug("xhci host controller %d: interrupt registered. irq num=%d", id, xhci_controller_irq_num[id]);
|
||
|
||
return 0;
|
||
}
|
||
|
||
/**
|
||
* @brief 初始化xhci控制器
|
||
*
|
||
* @param header 指定控制器的pci device头部
|
||
*/
|
||
void xhci_init(struct pci_device_structure_general_device_t *dev_hdr)
|
||
{
|
||
|
||
if (xhci_ctrl_count >= XHCI_MAX_HOST_CONTROLLERS)
|
||
{
|
||
kerror("Initialize xhci controller failed: exceed the limit of max controllers.");
|
||
return;
|
||
}
|
||
|
||
spin_lock(&xhci_controller_init_lock);
|
||
kinfo("Initializing xhci host controller: bus=%#02x, device=%#02x, func=%#02x, VendorID=%#04x, irq_line=%d, irq_pin=%d", dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, dev_hdr->header.Vendor_ID, dev_hdr->Interrupt_Line, dev_hdr->Interrupt_PIN);
|
||
|
||
int cid = xhci_hc_find_available_id();
|
||
if (cid < 0)
|
||
{
|
||
kerror("Initialize xhci controller failed: exceed the limit of max controllers.");
|
||
goto failed_exceed_max;
|
||
}
|
||
|
||
memset(&xhci_hc[cid], 0, sizeof(struct xhci_host_controller_t));
|
||
xhci_hc[cid].controller_id = cid;
|
||
xhci_hc[cid].pci_dev_hdr = dev_hdr;
|
||
pci_write_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0x4, 0x0006); // mem I/O access enable and bus master enable
|
||
|
||
// 为当前控制器映射寄存器地址空间
|
||
xhci_hc[cid].vbase = SPECIAL_MEMOEY_MAPPING_VIRT_ADDR_BASE + XHCI_MAPPING_OFFSET + 65536 * xhci_hc[cid].controller_id;
|
||
// kdebug("dev_hdr->BAR0 & (~0xf)=%#018lx", dev_hdr->BAR0 & (~0xf));
|
||
mm_map_phys_addr(xhci_hc[cid].vbase, dev_hdr->BAR0 & (~0xf), 65536, PAGE_KERNEL_PAGE | PAGE_PWT | PAGE_PCD, true);
|
||
|
||
// 读取xhci控制寄存器
|
||
uint16_t iversion = *(uint16_t *)(xhci_hc[cid].vbase + XHCI_CAPS_HCIVERSION);
|
||
|
||
struct xhci_caps_HCCPARAMS1_reg_t hcc1;
|
||
struct xhci_caps_HCCPARAMS2_reg_t hcc2;
|
||
|
||
struct xhci_caps_HCSPARAMS1_reg_t hcs1;
|
||
struct xhci_caps_HCSPARAMS2_reg_t hcs2;
|
||
memcpy(&hcc1, xhci_get_ptr_cap_reg32(cid, XHCI_CAPS_HCCPARAMS1), sizeof(struct xhci_caps_HCCPARAMS1_reg_t));
|
||
memcpy(&hcc2, xhci_get_ptr_cap_reg32(cid, XHCI_CAPS_HCCPARAMS2), sizeof(struct xhci_caps_HCCPARAMS2_reg_t));
|
||
memcpy(&hcs1, xhci_get_ptr_cap_reg32(cid, XHCI_CAPS_HCSPARAMS1), sizeof(struct xhci_caps_HCSPARAMS1_reg_t));
|
||
memcpy(&hcs2, xhci_get_ptr_cap_reg32(cid, XHCI_CAPS_HCSPARAMS2), sizeof(struct xhci_caps_HCSPARAMS2_reg_t));
|
||
|
||
// kdebug("hcc1.xECP=%#010lx", hcc1.xECP);
|
||
// 计算operational registers的地址
|
||
xhci_hc[cid].vbase_op = xhci_hc[cid].vbase + xhci_read_cap_reg8(cid, XHCI_CAPS_CAPLENGTH);
|
||
|
||
xhci_hc[cid].db_offset = xhci_read_cap_reg32(cid, XHCI_CAPS_DBOFF) & (~0x3); // bits [1:0] reserved
|
||
xhci_hc[cid].rts_offset = xhci_read_cap_reg32(cid, XHCI_CAPS_RTSOFF) & (~0x1f); // bits [4:0] reserved.
|
||
|
||
xhci_hc[cid].ext_caps_off = (hcc1.xECP) * 4;
|
||
xhci_hc[cid].context_size = (hcc1.csz) ? 64 : 32;
|
||
|
||
if (iversion < 0x95)
|
||
{
|
||
kwarn("Unsupported/Unknowned xHCI controller version: %#06x. This may cause unexpected behavior.", iversion);
|
||
}
|
||
|
||
// if it is a Panther Point device, make sure sockets are xHCI controlled.
|
||
if (((pci_read_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0) & 0xffff) == 0x8086) &&
|
||
((pci_read_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 2) & 0xffff) == 0x1E31) &&
|
||
((pci_read_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 8) & 0xff) == 4))
|
||
{
|
||
kdebug("Is a Panther Point device");
|
||
pci_write_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0xd8, 0xffffffff);
|
||
pci_write_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0xd0, 0xffffffff);
|
||
}
|
||
|
||
// 重置xhci控制器
|
||
FAIL_ON(xhci_hc_reset(cid), failed);
|
||
// 关闭legacy支持
|
||
FAIL_ON(xhci_hc_stop_legacy(cid), failed);
|
||
// 端口配对
|
||
FAIL_ON(xhci_hc_pair_ports(cid), failed);
|
||
|
||
// ========== 设置USB host controller =========
|
||
// 获取页面大小
|
||
xhci_hc[cid].page_size = (xhci_read_op_reg32(cid, XHCI_OPS_PAGESIZE) & 0xffff) << 12;
|
||
kdebug("page size=%d", xhci_hc[cid].page_size);
|
||
|
||
// 获取设备上下文空间
|
||
xhci_hc[cid].dcbaap_vaddr = (uint64_t)kmalloc(2048, 0); // 分配2KB的设备上下文地址数组空间
|
||
memset((void *)xhci_hc[cid].dcbaap_vaddr, 0, 2048);
|
||
|
||
kdebug("dcbaap_vaddr=%#018lx", xhci_hc[cid].dcbaap_vaddr);
|
||
if (unlikely(!xhci_is_aligned64(xhci_hc[cid].dcbaap_vaddr))) // 地址不是按照64byte对齐
|
||
{
|
||
kerror("dcbaap isn't 64 byte aligned.");
|
||
goto failed_free_dyn;
|
||
}
|
||
// 写入dcbaap
|
||
xhci_write_cap_reg64(cid, XHCI_OPS_DCBAAP, virt_2_phys(xhci_hc[cid].dcbaap_vaddr));
|
||
|
||
// 创建command ring
|
||
xhci_hc[cid].cmd_ring_vaddr = xhci_create_ring(XHCI_CMND_RING_TRBS);
|
||
if (unlikely(!xhci_is_aligned64(xhci_hc[cid].cmd_ring_vaddr))) // 地址不是按照64byte对齐
|
||
{
|
||
kerror("cmd ring isn't 64 byte aligned.");
|
||
goto failed_free_dyn;
|
||
}
|
||
|
||
// 设置初始cycle bit为1
|
||
xhci_hc[cid].cmd_trb_cycle = XHCI_TRB_CYCLE_ON;
|
||
|
||
// 写入command ring控制寄存器
|
||
xhci_write_op_reg64(cid, XHCI_OPS_CRCR, virt_2_phys(xhci_hc[cid].cmd_ring_vaddr) | xhci_hc[cid].cmd_trb_cycle);
|
||
// 写入配置寄存器
|
||
xhci_write_op_reg32(cid, XHCI_OPS_CONFIG, hcs1.max_slots);
|
||
// 写入设备通知控制寄存器
|
||
xhci_write_op_reg32(cid, XHCI_OPS_DNCTRL, (1 << 1)); // 目前只有N1被支持
|
||
|
||
FAIL_ON(xhci_hc_init_intr(cid), failed_free_dyn);
|
||
++xhci_ctrl_count;
|
||
spin_unlock(&xhci_controller_init_lock);
|
||
return;
|
||
|
||
failed_free_dyn:; // 释放动态申请的内存
|
||
if (xhci_hc[cid].dcbaap_vaddr)
|
||
kfree((void *)xhci_hc[cid].dcbaap_vaddr);
|
||
|
||
if (xhci_hc[cid].cmd_ring_vaddr)
|
||
kfree((void *)xhci_hc[cid].cmd_ring_vaddr);
|
||
|
||
if (xhci_hc[cid].event_ring_table_vaddr)
|
||
kfree((void *)xhci_hc[cid].event_ring_table_vaddr);
|
||
|
||
if (xhci_hc[cid].event_ring_vaddr)
|
||
kfree((void *)xhci_hc[cid].event_ring_vaddr);
|
||
|
||
failed:;
|
||
// 取消地址映射
|
||
mm_unmap(xhci_hc[cid].vbase, 65536);
|
||
|
||
// 清空数组
|
||
memset((void *)&xhci_hc[cid], 0, sizeof(struct xhci_host_controller_t));
|
||
|
||
failed_exceed_max:;
|
||
kerror("Failed to initialize controller: bus=%d, dev=%d, func=%d", dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func);
|
||
spin_unlock(&xhci_controller_init_lock);
|
||
} |