mirror of
https://github.com/DragonOS-Community/DragonOS.git
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540 lines
18 KiB
C
540 lines
18 KiB
C
#include "pci.h"
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#include <common/kprint.h>
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#include <mm/slab.h>
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#include <debug/bug.h>
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#include <common/errno.h>
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static uint count_device_list = 0;
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static void pci_checkBus(uint8_t bus);
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/**
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* @brief 将设备信息结构体加到链表里面
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*
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*/
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#define ADD_DEVICE_STRUCT_TO_LIST(ret) \
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do \
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{ \
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if (count_device_list > 0) \
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{ \
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++count_device_list; \
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list_add(pci_device_structure_list, &(ret->header.list)); \
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} \
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else \
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{ \
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++count_device_list; \
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list_init(&(ret->header.list)); \
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pci_device_structure_list = &(ret->header.list); \
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} \
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} while (0)
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/**
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* @brief 从pci配置空间读取信息
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*
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* @param bus 总线号
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* @param slot 设备号
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* @param func 功能号
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* @param offset 字节偏移量
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* @return uint 寄存器值
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*/
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uint32_t pci_read_config(uchar bus, uchar slot, uchar func, uchar offset)
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{
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uint lbus = (uint)bus;
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uint lslot = (uint)slot;
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uint lfunc = ((uint)func) & 7;
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// 构造pci配置空间地址
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uint address = (uint)((lbus << 16) | (lslot << 11) | (lfunc << 8) | (offset & 0xfc) | ((uint)0x80000000));
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io_out32(PORT_PCI_CONFIG_ADDRESS, address);
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// 读取返回的数据
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uint32_t ret = (uint)(io_in32(PORT_PCI_CONFIG_DATA));
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return ret;
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}
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/**
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* @brief 向pci配置空间写入信息
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*
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* @param bus 总线号
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* @param slot 设备号
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* @param func 功能号
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* @param offset 字节偏移量
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* @return uint 返回码
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*/
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uint pci_write_config(uchar bus, uchar slot, uchar func, uchar offset, uint32_t data)
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{
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uint lbus = (uint)bus;
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uint lslot = (uint)slot;
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uint lfunc = ((uint)func) & 7;
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// 构造pci配置空间地址
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uint address = (uint)((lbus << 16) | (lslot << 11) | (lfunc << 8) | (offset & 0xfc) | ((uint)0x80000000));
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io_out32(PORT_PCI_CONFIG_ADDRESS, address);
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// 写入数据
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io_out32(PORT_PCI_CONFIG_DATA, data);
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return 0;
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}
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/**
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* @brief 读取type为0x0的pci设备的header
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* 本函数只应被 pci_read_header()调用
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* @param header 返回的header
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* @param bus 总线号
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* @param slot 插槽号
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* @param func 功能号
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*/
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static void pci_read_general_device_header(struct pci_device_structure_general_device_t *header, uchar bus, uchar slot, uchar func)
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{
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uint32_t tmp32;
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header->BAR0 = pci_read_config(bus, slot, func, 0x10);
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header->BAR1 = pci_read_config(bus, slot, func, 0x14);
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header->BAR2 = pci_read_config(bus, slot, func, 0x18);
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header->BAR3 = pci_read_config(bus, slot, func, 0x1c);
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header->BAR4 = pci_read_config(bus, slot, func, 0x20);
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header->BAR5 = pci_read_config(bus, slot, func, 0x24);
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header->Cardbus_CIS_Pointer = pci_read_config(bus, slot, func, 0x28);
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tmp32 = pci_read_config(bus, slot, func, 0x2c);
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header->Subsystem_Vendor_ID = tmp32 & 0xffff;
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header->Subsystem_ID = (tmp32 >> 16) & 0xffff;
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header->Expansion_ROM_base_address = pci_read_config(bus, slot, func, 0x30);
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tmp32 = pci_read_config(bus, slot, func, 0x34);
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header->Capabilities_Pointer = tmp32 & 0xff;
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header->reserved0 = (tmp32 >> 8) & 0xff;
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header->reserved1 = (tmp32 >> 16) & 0xffff;
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header->reserved2 = pci_read_config(bus, slot, func, 0x38);
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tmp32 = pci_read_config(bus, slot, func, 0x3c);
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header->Interrupt_Line = tmp32 & 0xff;
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header->Interrupt_PIN = (tmp32 >> 8) & 0xff;
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header->Min_Grant = (tmp32 >> 16) & 0xff;
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header->Max_Latency = (tmp32 >> 24) & 0xff;
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}
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/**
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* @brief 读取type为0x1的pci_to_pci_bridge的header
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* 本函数只应被 pci_read_header()调用
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* @param header 返回的header
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* @param bus 总线号
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* @param slot 插槽号
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* @param func 功能号
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*/
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static void pci_read_pci_to_pci_bridge_header(struct pci_device_structure_pci_to_pci_bridge_t *header, uchar bus, uchar slot, uchar func)
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{
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uint32_t tmp32;
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header->BAR0 = pci_read_config(bus, slot, func, 0x10);
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header->BAR1 = pci_read_config(bus, slot, func, 0x14);
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tmp32 = pci_read_config(bus, slot, func, 0x18);
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header->Primary_Bus_Number = tmp32 & 0xff;
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header->Secondary_Bus_Number = (tmp32 >> 8) & 0xff;
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header->Subordinate_Bus_Number = (tmp32 >> 16) & 0xff;
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header->Secondary_Latency_Timer = (tmp32 >> 24) & 0xff;
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tmp32 = pci_read_config(bus, slot, func, 0x1c);
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header->io_base = tmp32 & 0xff;
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header->io_limit = (tmp32 >> 8) & 0xff;
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header->Secondary_Status = (tmp32 >> 16) & 0xffff;
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tmp32 = pci_read_config(bus, slot, func, 0x20);
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header->Memory_Base = tmp32 & 0xffff;
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header->Memory_Limit = (tmp32 >> 16) & 0xffff;
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tmp32 = pci_read_config(bus, slot, func, 0x24);
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header->Prefetchable_Memory_Base = tmp32 & 0xffff;
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header->Prefetchable_Memory_Limit = (tmp32 >> 16) & 0xffff;
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header->Prefetchable_Base_Upper_32_Bits = pci_read_config(bus, slot, func, 0x28);
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header->Prefetchable_Limit_Upper_32_Bits = pci_read_config(bus, slot, func, 0x2c);
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tmp32 = pci_read_config(bus, slot, func, 0x30);
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header->io_Base_Upper_16_Bits = tmp32 & 0xffff;
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header->io_Limit_Upper_16_Bits = (tmp32 >> 16) & 0xffff;
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tmp32 = pci_read_config(bus, slot, func, 0x34);
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header->Capability_Pointer = tmp32 & 0xff;
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header->reserved0 = (tmp32 >> 8) & 0xff;
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header->reserved1 = (tmp32 >> 16) & 0xffff;
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header->Expansion_ROM_base_address = pci_read_config(bus, slot, func, 0x38);
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tmp32 = pci_read_config(bus, slot, func, 0x3c);
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header->Interrupt_Line = tmp32 & 0xff;
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header->Interrupt_PIN = (tmp32 >> 8) & 0xff;
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header->Bridge_Control = (tmp32 >> 16) & 0xffff;
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}
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/**
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* @brief 读取type为0x2的pci_to_cardbus_bridge的header
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* 本函数只应被 pci_read_header()调用
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* @param header 返回的header
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* @param bus 总线号
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* @param slot 插槽号
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* @param func 功能号
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*/
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static void pci_read_pci_to_cardbus_bridge_header(struct pci_device_structure_pci_to_cardbus_bridge_t *header, uchar bus, uchar slot, uchar func)
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{
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uint32_t tmp32;
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header->CardBus_Socket_ExCa_base_address = pci_read_config(bus, slot, func, 0x10);
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tmp32 = pci_read_config(bus, slot, func, 0x14);
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header->Offset_of_capabilities_list = tmp32 & 0xff;
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header->Reserved = (tmp32 >> 8) & 0xff;
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header->Secondary_status = (tmp32 >> 16) & 0xff;
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tmp32 = pci_read_config(bus, slot, func, 0x18);
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header->PCI_bus_number = tmp32 & 0xff;
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header->CardBus_bus_number = (tmp32 >> 8) & 0xff;
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header->Subordinate_bus_number = (tmp32 >> 16) & 0xff;
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header->CardBus_latency_timer = (tmp32 >> 24) & 0xff;
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header->Memory_Base_Address0 = pci_read_config(bus, slot, func, 0x1c);
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header->Memory_Limit0 = pci_read_config(bus, slot, func, 0x20);
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header->Memory_Base_Address1 = pci_read_config(bus, slot, func, 0x24);
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header->Memory_Limit1 = pci_read_config(bus, slot, func, 0x28);
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header->IO_Base_Address0 = pci_read_config(bus, slot, func, 0x2c);
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header->IO_Limit0 = pci_read_config(bus, slot, func, 0x30);
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header->IO_Base_Address1 = pci_read_config(bus, slot, func, 0x34);
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header->IO_Limit1 = pci_read_config(bus, slot, func, 0x38);
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tmp32 = pci_read_config(bus, slot, func, 0x3c);
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header->Interrupt_Line = tmp32 & 0xff;
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header->Interrupt_PIN = (tmp32 >> 8) & 0xff;
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header->Bridge_Control = (tmp32 >> 16) & 0xffff;
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tmp32 = pci_read_config(bus, slot, func, 0x40);
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header->Subsystem_Device_ID = tmp32 & 0xffff;
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header->Subsystem_Vendor_ID = (tmp32 >> 16) & 0xffff;
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header->PC_Card_legacy_mode_base_address_16_bit = pci_read_config(bus, slot, func, 0x44);
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}
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/**
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* @brief 读取pci设备标头
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*
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* @param type 标头类型
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* @param bus 总线号
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* @param slot 插槽号
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* @param func 功能号
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* @param add_to_list 添加到链表
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* @return 返回的header
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*/
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void *pci_read_header(int *type, uchar bus, uchar slot, uchar func, bool add_to_list)
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{
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struct pci_device_structure_header_t *common_header = (struct pci_device_structure_header_t *)kmalloc(127, 0);
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common_header->bus = bus;
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common_header->device = slot;
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common_header->func = func;
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uint32_t tmp32;
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// 先读取公共header
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tmp32 = pci_read_config(bus, slot, func, 0x0);
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common_header->Vendor_ID = tmp32 & 0xffff;
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common_header->Device_ID = (tmp32 >> 16) & 0xffff;
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tmp32 = pci_read_config(bus, slot, func, 0x4);
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common_header->Command = tmp32 & 0xffff;
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common_header->Status = (tmp32 >> 16) & 0xffff;
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tmp32 = pci_read_config(bus, slot, func, 0x8);
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common_header->RevisionID = tmp32 & 0xff;
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common_header->ProgIF = (tmp32 >> 8) & 0xff;
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common_header->SubClass = (tmp32 >> 16) & 0xff;
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common_header->Class_code = (tmp32 >> 24) & 0xff;
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tmp32 = pci_read_config(bus, slot, func, 0xc);
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common_header->CacheLineSize = tmp32 & 0xff;
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common_header->LatencyTimer = (tmp32 >> 8) & 0xff;
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common_header->HeaderType = (tmp32 >> 16) & 0xff;
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common_header->BIST = (tmp32 >> 24) & 0xff;
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void *ret;
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if (common_header->Vendor_ID == 0xffff)
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{
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*type = -ENXIO;
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kfree(common_header);
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return NULL;
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}
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// 根据公共头部,判断该结构所属的类型
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switch (common_header->HeaderType)
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{
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case 0x0: // general device
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ret = common_header;
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pci_read_general_device_header((struct pci_device_structure_general_device_t *)ret, bus, slot, func);
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if (add_to_list)
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ADD_DEVICE_STRUCT_TO_LIST(((struct pci_device_structure_general_device_t *)ret));
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*type = 0x0;
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return ret;
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break;
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case 0x1:
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ret = common_header;
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pci_read_pci_to_pci_bridge_header((struct pci_device_structure_pci_to_pci_bridge_t *)ret, bus, slot, func);
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if (add_to_list)
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ADD_DEVICE_STRUCT_TO_LIST(((struct pci_device_structure_pci_to_pci_bridge_t *)ret));
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*type = 0x1;
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return ret;
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break;
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case 0x2:
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ret = common_header;
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pci_read_pci_to_cardbus_bridge_header((struct pci_device_structure_pci_to_cardbus_bridge_t *)ret, bus, slot, func);
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if (add_to_list)
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ADD_DEVICE_STRUCT_TO_LIST(((struct pci_device_structure_pci_to_cardbus_bridge_t *)ret));
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*type = 0x2;
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return ret;
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break;
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default: // 错误的头类型 这里不应该被执行
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// kerror("PCI->pci_read_header(): Invalid header type.");
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*type = -EINVAL;
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// kerror("vendor id=%#010lx", common_header->Vendor_ID);
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// kerror("header type = %d", common_header->HeaderType);
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kfree(common_header);
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return NULL;
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break;
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}
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}
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static void pci_checkFunction(uint8_t bus, uint8_t device, uint8_t function)
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{
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int header_type;
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struct pci_device_structure_header_t *header = pci_read_header(&header_type, bus, device, function, true);
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if (header_type == -EINVAL)
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{
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// kerror("pci_checkFunction(): wrong header type!");
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// 此处内存已经在read header函数里面释放,不用重复释放
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return;
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}
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// header = ((struct pci_device_structure_general_device_t *)raw_header)->header;
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if ((header->Class_code == 0x6) && (header->SubClass == 0x4))
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{
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uint8_t SecondaryBus = ((struct pci_device_structure_pci_to_pci_bridge_t *)header)->Secondary_Bus_Number;
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pci_checkBus(SecondaryBus);
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}
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}
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static int pci_checkDevice(uint8_t bus, uint8_t device)
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{
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int header_type;
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struct pci_device_structure_header_t *header = pci_read_header(&header_type, bus, device, 0, false);
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if (header_type == -EINVAL)
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{
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// 此处内存已经在read header函数里面释放,不用重复释放
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return -EINVAL;
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}
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if (header_type == -ENXIO)
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{
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// kerror("DEVICE INVALID");
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return -ENXIO;
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}
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uint16_t vendorID = header->Vendor_ID;
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if (vendorID == 0xffff) // 设备不存在
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{
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kfree(header);
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return -ENXIO;
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}
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pci_checkFunction(bus, device, 0);
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header_type = header->HeaderType;
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if ((header_type & 0x80) != 0)
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{
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kdebug("Multi func device");
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// 这是一个多function的设备,因此查询剩余的function
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for (uint8_t func = 1; func < 8; ++func)
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{
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struct pci_device_structure_header_t *tmp_header;
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tmp_header = (struct pci_device_structure_header_t *)pci_read_header(&header_type, bus, device, func, false);
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if (tmp_header->Vendor_ID != 0xffff)
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pci_checkFunction(bus, device, func);
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// 释放内存
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kfree(tmp_header);
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}
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}
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kfree(header);
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return 0;
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}
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static void pci_checkBus(uint8_t bus)
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{
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for (uint8_t device = 0; device < 32; ++device)
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{
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pci_checkDevice(bus, device);
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}
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}
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/**
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* @brief 扫描所有pci总线上的所有设备
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*
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*/
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void pci_checkAllBuses()
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{
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kinfo("Checking all devices in PCI bus...");
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int header_type;
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struct pci_device_structure_header_t *header = pci_read_header(&header_type, 0, 0, 0, false);
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if (header_type == EINVAL)
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{
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kBUG("pci_checkAllBuses(): wrong header type!");
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// 此处内存已经在read header函数里面释放,不用重复释放
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return;
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}
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header_type = header->HeaderType;
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if ((header_type & 0x80) == 0) // Single pci host controller
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{
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pci_checkBus(0);
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}
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else
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{
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// Multiple PCI host controller
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// 那么总线0,设备0,功能1则是总线1的pci主机控制器,以此类推
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struct pci_device_structure_header_t *tmp_header;
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for (uint8_t func = 0; func < 8; ++func)
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{
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tmp_header = (struct pci_device_structure_header_t *)pci_read_header(&header_type, 0, 0, func, false);
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if (WARN_ON(header->Vendor_ID != 0xffff)) // @todo 这里的判断条件可能有点问题
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{
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kfree(tmp_header);
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break;
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}
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pci_checkBus(func);
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kfree(tmp_header);
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}
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}
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kfree(header);
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}
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void pci_init()
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{
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kinfo("Initializing PCI bus...");
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pci_checkAllBuses();
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kinfo("Total pci device and function num = %d", count_device_list);
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struct pci_device_structure_header_t *ptr = container_of(pci_device_structure_list, struct pci_device_structure_header_t, list);
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for (int i = 0; i < count_device_list; ++i)
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{
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if (ptr->HeaderType == 0x0)
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{
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if (ptr->Status & 0x10)
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{
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kinfo("[ pci device %d ] class code = %d\tsubclass=%d\tstatus=%#010lx\tcap_pointer=%#010lx\tbar5=%#010lx", i, ptr->Class_code, ptr->SubClass, ptr->Status, ((struct pci_device_structure_general_device_t *)ptr)->Capabilities_Pointer, ((struct pci_device_structure_general_device_t *)ptr)->BAR5);
|
||
uint32_t tmp = pci_read_config(ptr->bus, ptr->device, ptr->func, ((struct pci_device_structure_general_device_t *)ptr)->Capabilities_Pointer);
|
||
}
|
||
else
|
||
{
|
||
|
||
kinfo("[ pci device %d ] class code = %d\tsubclass=%d\tstatus=%#010lx\t", i, ptr->Class_code, ptr->SubClass, ptr->Status);
|
||
}
|
||
}
|
||
else if (ptr->HeaderType == 0x1)
|
||
{
|
||
if (ptr->Status & 0x10)
|
||
{
|
||
kinfo("[ pci device %d ] class code = %d\tsubclass=%d\tstatus=%#010lx\tcap_pointer=%#010lx", i, ptr->Class_code, ptr->SubClass, ptr->Status, ((struct pci_device_structure_pci_to_pci_bridge_t *)ptr)->Capability_Pointer);
|
||
}
|
||
else
|
||
{
|
||
|
||
kinfo("[ pci device %d ] class code = %d\tsubclass=%d\tstatus=%#010lx\t", i, ptr->Class_code, ptr->SubClass, ptr->Status);
|
||
}
|
||
}
|
||
else if (ptr->HeaderType == 0x2)
|
||
{
|
||
kinfo("[ pci device %d ] class code = %d\tsubclass=%d\tstatus=%#010lx\t", i, ptr->Class_code, ptr->SubClass, ptr->Status);
|
||
}
|
||
|
||
ptr = container_of(list_next(&(ptr->list)), struct pci_device_structure_header_t, list);
|
||
}
|
||
kinfo("PCI bus initialized.")
|
||
}
|
||
|
||
|
||
/**
|
||
* @brief 获取 device structure
|
||
*
|
||
* @param class_code
|
||
* @param sub_class
|
||
* @param res 返回的结果数组
|
||
*/
|
||
void pci_get_device_structure(uint8_t class_code, uint8_t sub_class, struct pci_device_structure_header_t *res[], uint32_t *count_res)
|
||
{
|
||
|
||
struct pci_device_structure_header_t *ptr = container_of(pci_device_structure_list, struct pci_device_structure_header_t, list);
|
||
*count_res = 0;
|
||
|
||
for (int i = 0; i < count_device_list; ++i)
|
||
{
|
||
if ((ptr->Class_code == class_code) && (ptr->SubClass == sub_class))
|
||
{
|
||
kdebug("[%d] class_code=%d, sub_class=%d, progIF=%d, bar5=%#010lx", i, ptr->Class_code, ptr->SubClass, ptr->ProgIF, ((struct pci_device_structure_general_device_t *)ptr)->BAR5);
|
||
|
||
res[*count_res] = ptr;
|
||
++(*count_res);
|
||
}
|
||
ptr = container_of(list_next(&(ptr->list)), struct pci_device_structure_header_t, list);
|
||
}
|
||
}
|
||
|
||
/**
|
||
* @brief 寻找符合指定类型的capability list
|
||
*
|
||
* @param pci_dev pci设备header
|
||
* @param cap_type c要寻找的capability类型
|
||
* @return uint64_t cap list的偏移量
|
||
*/
|
||
uint32_t pci_enumerate_capability_list(struct pci_device_structure_header_t *pci_dev, int cap_type)
|
||
{
|
||
uint32_t cap_offset;
|
||
switch (pci_dev->HeaderType)
|
||
{
|
||
case 0x00:
|
||
|
||
cap_offset = ((struct pci_device_structure_general_device_t *)pci_dev)->Capabilities_Pointer;
|
||
break;
|
||
|
||
case 0x10:
|
||
cap_offset = ((struct pci_device_structure_pci_to_pci_bridge_t *)pci_dev)->Capability_Pointer;
|
||
break;
|
||
default:
|
||
// 不支持
|
||
return -ENOSYS;
|
||
}
|
||
uint32_t tmp;
|
||
while (1)
|
||
{
|
||
tmp = pci_read_config(pci_dev->bus, pci_dev->device, pci_dev->func, cap_offset);
|
||
if (tmp & 0xff != cap_type)
|
||
{
|
||
if ((tmp & 0xff00) >> 8)
|
||
{
|
||
cap_offset = (tmp & 0xff00);
|
||
continue;
|
||
}
|
||
else
|
||
return -ENOSYS;
|
||
}
|
||
|
||
return cap_offset;
|
||
}
|
||
} |