diff --git a/kernel/comps/time/src/rtc.rs b/kernel/comps/time/src/rtc.rs index 4347910ab..6225a57e6 100644 --- a/kernel/comps/time/src/rtc.rs +++ b/kernel/comps/time/src/rtc.rs @@ -2,12 +2,12 @@ use core::sync::atomic::{AtomicU8, Ordering::Relaxed}; -use ostd::arch::x86::device::cmos::{get_century_register, CMOS_ADDRESS, CMOS_DATA}; +use ostd::arch::x86::device::cmos::{century_register, CMOS_ADDRESS, CMOS_DATA}; pub(crate) static CENTURY_REGISTER: AtomicU8 = AtomicU8::new(0); pub fn init() { - let Some(century_register) = get_century_register() else { + let Some(century_register) = century_register() else { return; }; CENTURY_REGISTER.store(century_register, Relaxed); diff --git a/ostd/src/arch/x86/console.rs b/ostd/src/arch/x86/console.rs index 034b39a7b..2c467f327 100644 --- a/ostd/src/arch/x86/console.rs +++ b/ostd/src/arch/x86/console.rs @@ -96,7 +96,7 @@ fn handle_serial_input(trap_frame: &TrapFrame) { } fn line_sts() -> LineSts { - LineSts::from_bits_truncate(CONSOLE_COM1_PORT.line_status.read()) + LineSts::from_bits_truncate(CONSOLE_COM1_PORT.line_status()) } /// Sends a byte on the serial port. @@ -104,15 +104,15 @@ pub fn send(data: u8) { match data { 8 | 0x7F => { while !line_sts().contains(LineSts::OUTPUT_EMPTY) {} - CONSOLE_COM1_PORT.data.write(8); + CONSOLE_COM1_PORT.send(8); while !line_sts().contains(LineSts::OUTPUT_EMPTY) {} - CONSOLE_COM1_PORT.data.write(b' '); + CONSOLE_COM1_PORT.send(b' '); while !line_sts().contains(LineSts::OUTPUT_EMPTY) {} - CONSOLE_COM1_PORT.data.write(8); + CONSOLE_COM1_PORT.send(8); } _ => { while !line_sts().contains(LineSts::OUTPUT_EMPTY) {} - CONSOLE_COM1_PORT.data.write(data); + CONSOLE_COM1_PORT.send(data); } } } @@ -120,7 +120,7 @@ pub fn send(data: u8) { /// Receives a byte on the serial port. non-blocking pub fn receive_char() -> Option { if line_sts().contains(LineSts::INPUT_FULL) { - Some(CONSOLE_COM1_PORT.data.read()) + Some(CONSOLE_COM1_PORT.recv()) } else { None } diff --git a/ostd/src/arch/x86/device/cmos.rs b/ostd/src/arch/x86/device/cmos.rs index 64394e11f..512369589 100644 --- a/ostd/src/arch/x86/device/cmos.rs +++ b/ostd/src/arch/x86/device/cmos.rs @@ -1,5 +1,12 @@ // SPDX-License-Identifier: MPL-2.0 +//! Provides CMOS I/O port access. +//! +//! "CMOS" is a tiny bit of very low power static memory that lives on the same chip as the Real-Time Clock (RTC). +//! +//! Reference: +//! + #![allow(unused_variables)] use acpi::{fadt::Fadt, sdt::Signature}; @@ -8,10 +15,14 @@ use x86_64::instructions::port::{ReadOnlyAccess, WriteOnlyAccess}; use super::io_port::IoPort; use crate::arch::x86::kernel::acpi::ACPI_TABLES; +/// CMOS address I/O port pub static CMOS_ADDRESS: IoPort = unsafe { IoPort::new(0x70) }; + +/// CMOS data I/O port pub static CMOS_DATA: IoPort = unsafe { IoPort::new(0x71) }; -pub fn get_century_register() -> Option { +/// Gets the century register location. This function is used in RTC(Real Time Clock) module initialization. +pub fn century_register() -> Option { if !ACPI_TABLES.is_completed() { return None; } diff --git a/ostd/src/arch/x86/device/io_port.rs b/ostd/src/arch/x86/device/io_port.rs index 7f807e921..fda5a1016 100644 --- a/ostd/src/arch/x86/device/io_port.rs +++ b/ostd/src/arch/x86/device/io_port.rs @@ -1,5 +1,7 @@ // SPDX-License-Identifier: MPL-2.0 +//! I/O port access. + use core::marker::PhantomData; pub use x86_64::{ @@ -29,7 +31,7 @@ pub struct IoPort { } impl IoPort { - /// Create an I/O port. + /// Creates an I/O port. /// /// # Safety /// @@ -45,6 +47,7 @@ impl IoPort { } impl IoPort { + /// Reads from the I/O port #[inline] pub fn read(&self) -> T { unsafe { PortRead::read_from_port(self.port) } @@ -52,6 +55,7 @@ impl IoPort { } impl IoPort { + /// Writes to the I/O port #[inline] pub fn write(&self, value: T) { unsafe { PortWrite::write_to_port(self.port, value) } diff --git a/ostd/src/arch/x86/device/serial.rs b/ostd/src/arch/x86/device/serial.rs index e64f3cb08..84568957f 100644 --- a/ostd/src/arch/x86/device/serial.rs +++ b/ostd/src/arch/x86/device/serial.rs @@ -2,6 +2,8 @@ //! A port-mapped UART. Copied from uart_16550. +#![allow(dead_code)] + use crate::arch::x86::device::io_port::{IoPort, ReadWriteAccess, WriteOnlyAccess}; /// A serial port. @@ -9,17 +11,24 @@ use crate::arch::x86::device::io_port::{IoPort, ReadWriteAccess, WriteOnlyAccess /// Serial ports are a legacy communications port common on IBM-PC compatible computers. /// Ref: pub struct SerialPort { - pub data: IoPort, - pub int_en: IoPort, - pub fifo_ctrl: IoPort, - pub line_ctrl: IoPort, - pub modem_ctrl: IoPort, - pub line_status: IoPort, - pub modem_status: IoPort, + /// Data Register + data: IoPort, + /// Interrupt Enable Register + int_en: IoPort, + /// First In First Out Control Register + fifo_ctrl: IoPort, + /// Line control Register + line_ctrl: IoPort, + /// Modem Control Register + modem_ctrl: IoPort, + /// Line status Register + line_status: IoPort, + /// Modem Status Register + modem_status: IoPort, } impl SerialPort { - /// Create a serial port. + /// Creates a serial port. /// /// # Safety /// @@ -43,6 +52,7 @@ impl SerialPort { } } + /// Initializes the serial port. pub fn init(&self) { // Disable interrupts self.int_en.write(0x00); @@ -62,4 +72,22 @@ impl SerialPort { // Enable interrupts self.int_en.write(0x01); } + + /// Sends data to the data port + #[inline] + pub fn send(&self, data: u8) { + self.data.write(data); + } + + /// Receives data from the data port + #[inline] + pub fn recv(&self) -> u8 { + self.data.read() + } + + /// Gets line status + #[inline] + pub fn line_status(&self) -> u8 { + self.line_status.read() + } }