mirror of
https://github.com/asterinas/asterinas.git
synced 2025-06-23 01:13:23 +00:00
Use #[expect(lint)]
, not #[allow(lint)]
This commit is contained in:
committed by
Tate, Hongliang Tian
parent
1899646391
commit
0dca168717
@ -75,7 +75,7 @@ pub struct InputDevice {
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event_queue: SpinLock<VirtQueue>,
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status_queue: VirtQueue,
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event_table: EventTable,
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#[allow(clippy::type_complexity)]
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#[expect(clippy::type_complexity)]
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callbacks: RwLock<Vec<Arc<dyn Fn(InputEvent) + Send + Sync + 'static>>, LocalIrqDisabled>,
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transport: SpinLock<Box<dyn VirtioTransport>>,
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}
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@ -34,7 +34,7 @@ bitflags! {
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#[repr(u8)]
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#[derive(Default, Debug, Clone, Copy, TryFromInt)]
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#[allow(non_camel_case_types)]
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#[expect(non_camel_case_types)]
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pub enum GsoType {
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#[default]
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VIRTIO_NET_HDR_GSO_NONE = 0,
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@ -11,7 +11,7 @@ use ostd::bus::pci::{
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#[derive(Debug, Clone, PartialEq, Eq, PartialOrd, Ord)]
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#[repr(u8)]
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#[allow(clippy::enum_variant_names)]
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#[expect(clippy::enum_variant_names)]
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pub enum VirtioPciCpabilityType {
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CommonCfg = 1,
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NotifyCfg = 2,
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@ -268,7 +268,7 @@ impl VirtioTransport for VirtioPciModernTransport {
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}
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impl VirtioPciModernTransport {
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#[allow(clippy::result_large_err)]
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#[expect(clippy::result_large_err)]
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pub(super) fn new(
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common_device: PciCommonDevice,
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) -> Result<Self, (BusProbeError, PciCommonDevice)> {
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@ -73,7 +73,7 @@ pub struct VirtioPciLegacyTransport {
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impl VirtioPciLegacyTransport {
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pub const QUEUE_ALIGN_SIZE: usize = 4096;
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#[allow(clippy::result_large_err)]
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#[expect(clippy::result_large_err)]
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pub(super) fn new(
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common_device: PciCommonDevice,
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) -> Result<Self, (BusProbeError, PciCommonDevice)> {
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