diff --git a/ostd/src/arch/x86/iommu/dma_remapping/context_table.rs b/ostd/src/arch/x86/iommu/dma_remapping/context_table.rs index 4a5bd5f44..6e6d162f7 100644 --- a/ostd/src/arch/x86/iommu/dma_remapping/context_table.rs +++ b/ostd/src/arch/x86/iommu/dma_remapping/context_table.rs @@ -98,7 +98,7 @@ impl RootTable { Ok(()) } - /// Specify the device page table instead of creating a page table if not exists. + /// Specifies the device page table instead of creating a page table if not exists. /// /// This will be useful if we want all the devices to use the same page table. /// The original page table will be overwritten. @@ -195,7 +195,7 @@ impl ContextEntry { } } - /// Get the second stage page translation pointer. + /// Gets the second stage page translation pointer. /// /// This function will not right shift the value after the `and` operation. pub const fn second_stage_pointer(&self) -> u64 { diff --git a/ostd/src/arch/x86/iommu/fault.rs b/ostd/src/arch/x86/iommu/fault.rs index c976e84d4..4095f05bb 100644 --- a/ostd/src/arch/x86/iommu/fault.rs +++ b/ostd/src/arch/x86/iommu/fault.rs @@ -35,7 +35,7 @@ impl FaultEventRegisters { FaultStatus::from_bits_truncate(self.status.read()) } - /// Create an instance from base address. + /// Creates an instance from base address. /// /// # Safety /// diff --git a/ostd/src/arch/x86/iommu/interrupt_remapping/mod.rs b/ostd/src/arch/x86/iommu/interrupt_remapping/mod.rs index e547e787e..25425551f 100644 --- a/ostd/src/arch/x86/iommu/interrupt_remapping/mod.rs +++ b/ostd/src/arch/x86/iommu/interrupt_remapping/mod.rs @@ -40,7 +40,7 @@ impl IrtEntryHandle { self.entry_ref = None; } - /// Create a handle based on index and the interrupt remapping table base virtual address. + /// Creates a handle based on index and the interrupt remapping table base virtual address. /// /// # Safety /// diff --git a/ostd/src/arch/x86/iommu/interrupt_remapping/table.rs b/ostd/src/arch/x86/iommu/interrupt_remapping/table.rs index 1ec3623f0..54c715154 100644 --- a/ostd/src/arch/x86/iommu/interrupt_remapping/table.rs +++ b/ostd/src/arch/x86/iommu/interrupt_remapping/table.rs @@ -157,7 +157,7 @@ impl IrtEntry { self.0 = 0 } - /// Enable this entry with no validation, + /// Enables this entry with no validation, /// DST = 0, IM = 0, DLM = 0, TM = 0, RH = 0, DM = 0, FPD = 1, P = 1 pub fn enable_default(&mut self, vector: u32) { self.0 = 0b11 | (vector as u128) << 16; diff --git a/ostd/src/arch/x86/iommu/registers/extended_cap.rs b/ostd/src/arch/x86/iommu/registers/extended_cap.rs index 1f1b5d6b7..62d2acf61 100644 --- a/ostd/src/arch/x86/iommu/registers/extended_cap.rs +++ b/ostd/src/arch/x86/iommu/registers/extended_cap.rs @@ -7,7 +7,7 @@ use bitflags::bitflags; pub struct ExtendedCapability(u64); impl ExtendedCapability { - /// Create ExtendedCapability from `value` + /// Creates ExtendedCapability from `value` pub const fn new(value: u64) -> Self { Self(value) } diff --git a/ostd/src/arch/x86/iommu/registers/invalidation.rs b/ostd/src/arch/x86/iommu/registers/invalidation.rs index 4df3c773b..3d3ddf3ff 100644 --- a/ostd/src/arch/x86/iommu/registers/invalidation.rs +++ b/ostd/src/arch/x86/iommu/registers/invalidation.rs @@ -29,7 +29,7 @@ pub struct InvalidationRegisters { } impl InvalidationRegisters { - /// Create an instance from IOMMU base address. + /// Creates an instance from IOMMU base address. /// /// # Safety /// diff --git a/ostd/src/arch/x86/iommu/registers/mod.rs b/ostd/src/arch/x86/iommu/registers/mod.rs index 56b664c8a..bcc9963ca 100644 --- a/ostd/src/arch/x86/iommu/registers/mod.rs +++ b/ostd/src/arch/x86/iommu/registers/mod.rs @@ -81,7 +81,7 @@ pub struct IommuRegisters { } impl IommuRegisters { - /// Version of IOMMU + /// Reads the version of IOMMU #[allow(dead_code)] pub fn read_version(&self) -> IommuVersion { let version = self.version.read(); @@ -91,22 +91,22 @@ impl IommuRegisters { } } - /// Capability of IOMMU + /// Reads the capability of IOMMU pub fn read_capability(&self) -> Capability { Capability::new(self.capability.read()) } - /// Extended Capability of IOMMU + /// Reads the extended Capability of IOMMU pub fn read_extended_capability(&self) -> ExtendedCapability { ExtendedCapability::new(self.extended_capability.read()) } - /// Global Status of IOMMU + /// Reads the global Status of IOMMU pub fn read_global_status(&self) -> GlobalStatus { GlobalStatus::from_bits_truncate(self.global_status.read()) } - /// Enable DMA remapping with static RootTable + /// Enables DMA remapping with static RootTable pub(super) fn enable_dma_remapping( &mut self, root_table: &'static SpinLock, @@ -122,7 +122,7 @@ impl IommuRegisters { while !self.read_global_status().contains(GlobalStatus::TES) {} } - /// Enable Interrupt Remapping with IntRemappingTable + /// Enables Interrupt Remapping with IntRemappingTable pub(super) fn enable_interrupt_remapping(&mut self, table: &'static IntRemappingTable) { assert!(self .read_extended_capability() @@ -223,7 +223,7 @@ impl IommuRegisters { .write(0x9000_0000_0000_0000); } - /// Write value to the global command register. This function will not wait until the command + /// Writes value to the global command register. This function will not wait until the command /// is serviced. User need to check the global status register. fn write_global_command(&mut self, command: GlobalCommand, enable: bool) { const ONE_SHOT_STATUS_MASK: u32 = 0x96FF_FFFF; @@ -235,7 +235,7 @@ impl IommuRegisters { } } - /// Create an instance from base address + /// Creates an instance from base address fn new() -> Option { let dmar = Dmar::new()?;