Rename various concepts related to memory management

This commit is contained in:
Zhang Junyang
2024-05-26 17:53:44 +00:00
committed by Tate, Hongliang Tian
parent 03a39c94ca
commit 14e1b1a9fc
97 changed files with 331 additions and 353 deletions

View File

@ -9,11 +9,11 @@ use pod::Pod;
use super::second_stage::{DeviceMode, PageTableEntry, PagingConsts};
use crate::{
bus::pci::PciDeviceLocation,
vm::{
mm::{
dma::Daddr,
page_prop::{CachePolicy, PageProperty, PrivilegedPageFlags as PrivFlags},
page_table::PageTableError,
Paddr, PageFlags, PageTable, VmAllocOptions, VmFrame, VmIo, PAGE_SIZE,
Frame, Paddr, PageFlags, PageTable, VmAllocOptions, VmIo, PAGE_SIZE,
},
};
@ -36,7 +36,7 @@ impl RootEntry {
pub struct RootTable {
/// Total 256 bus, each entry is 128 bits.
root_frame: VmFrame,
root_frame: Frame,
// TODO: Use radix tree instead.
context_tables: BTreeMap<Paddr, ContextTable>,
}
@ -233,7 +233,7 @@ pub enum AddressWidth {
pub struct ContextTable {
/// Total 32 devices, each device has 8 functions.
entries_frame: VmFrame,
entries_frame: Frame,
page_tables: BTreeMap<Paddr, PageTable<DeviceMode, PageTableEntry, PagingConsts>>,
}