Samuka007/asterinas
1
0
Fork 0
mirror of https://github.com/asterinas/asterinas.git synced 2025-06-19 20:46:35 +00:00
Code Issues Packages Projects Releases Wiki Activity

Rename various concepts related to memory management

Browse Source
This commit is contained in:
Zhang Junyang
2024-05-26 17:53:44 +00:00
committed by Tate, Hongliang Tian
parent 03a39c94ca
commit 14e1b1a9fc
97 changed files with 331 additions and 353 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
kernel/comps/virtio/src/queue.rs
View File

@ -10,8 +10,8 @@ use core::{
use aster_frame::{
io_mem::IoMem,
mm::{DmaCoherent, VmAllocOptions},
offset_of,
vm::{DmaCoherent, VmAllocOptions},
};
use aster_rights::{Dup, TRightSet, TRights, Write};
use aster_util::{field_ptr, safe_ptr::SafePtr};
@ -74,7 +74,7 @@ impl VirtQueue {
let (descriptor_ptr, avail_ring_ptr, used_ring_ptr) = if transport.is_legacy_version() {
// FIXME: How about pci legacy?
// Currently, we use one VmFrame to place the descriptors and avaliable rings, one VmFrame to place used rings
// Currently, we use one Frame to place the descriptors and avaliable rings, one Frame to place used rings
// because the virtio-mmio legacy required the address to be continuous. The max queue size is 128.
if size > 128 {
return Err(QueueError::InvalidArgs);