Rename TrapInformation

This commit is contained in:
Yuke Peng 2023-11-20 21:57:35 +08:00 committed by Tate, Hongliang Tian
parent edd808bd3d
commit 232888982c
3 changed files with 24 additions and 24 deletions

View File

@ -93,15 +93,15 @@ impl CpuSet {
pub struct UserContext {
user_context: RawUserContext,
fp_regs: FpRegs,
trap_information: TrapInformation,
cpu_exception_info: CpuExceptionInfo,
}
#[derive(Clone, Default, Copy, Debug)]
#[repr(C)]
pub struct TrapInformation {
pub cr2: usize,
pub struct CpuExceptionInfo {
pub id: usize,
pub err: usize,
pub error_code: usize,
pub page_fault_addr: usize,
}
#[cfg(feature = "intel_tdx")]
@ -159,8 +159,8 @@ impl UserContext {
&mut self.user_context.general
}
pub fn trap_information(&self) -> &TrapInformation {
&self.trap_information
pub fn trap_information(&self) -> &CpuExceptionInfo {
&self.cpu_exception_info
}
pub fn fp_regs(&self) -> &FpRegs {
@ -209,10 +209,10 @@ impl UserContextApiInternal for UserContext {
crate::arch::irq::enable_local();
if self.user_context.trap_num as u16 != SYSCALL_TRAPNUM {
self.trap_information = TrapInformation {
cr2: unsafe { x86::controlregs::cr2() },
self.cpu_exception_info = CpuExceptionInfo {
page_fault_addr: unsafe { x86::controlregs::cr2() },
id: self.user_context.trap_num,
err: self.user_context.error_code,
error_code: self.user_context.error_code,
};
UserEvent::Exception
} else {

View File

@ -1,4 +1,4 @@
use jinux_frame::cpu::{CpuException, TrapInformation};
use jinux_frame::cpu::{CpuException, CpuExceptionInfo};
use jinux_frame::cpu::{
ALIGNMENT_CHECK, BOUND_RANGE_EXCEEDED, DIVIDE_BY_ZERO, GENERAL_PROTECTION_FAULT,
INVALID_OPCODE, PAGE_FAULT, SIMD_FLOATING_POINT_EXCEPTION, X87_FLOATING_POINT_EXCEPTION,
@ -18,7 +18,7 @@ pub struct FaultSignal {
}
impl FaultSignal {
pub fn new(trap_info: &TrapInformation) -> FaultSignal {
pub fn new(trap_info: &CpuExceptionInfo) -> FaultSignal {
debug!("Trap id: {}", trap_info.id);
let exception = CpuException::to_cpu_exception(trap_info.id as u16).unwrap();
let (num, code, addr) = match *exception {
@ -32,12 +32,12 @@ impl FaultSignal {
GENERAL_PROTECTION_FAULT => (SIGBUS, BUS_ADRERR, None),
PAGE_FAULT => {
const PF_ERR_FLAG_PRESENT: usize = 1usize << 0;
let code = if trap_info.err & PF_ERR_FLAG_PRESENT != 0 {
let code = if trap_info.error_code & PF_ERR_FLAG_PRESENT != 0 {
SEGV_ACCERR
} else {
SEGV_MAPERR
};
let addr = Some(trap_info.cr2 as u64);
let addr = Some(trap_info.page_fault_addr as u64);
(SIGSEGV, code, addr)
}
_ => panic!("Exception cannnot be a signal"),

View File

@ -20,17 +20,17 @@ pub fn handle_exception(context: &UserContext) {
}
}
fn handle_page_fault(trap_info: &TrapInformation) {
fn handle_page_fault(trap_info: &CpuExceptionInfo) {
const PAGE_NOT_PRESENT_ERROR_MASK: usize = 0x1 << 0;
const WRITE_ACCESS_MASK: usize = 0x1 << 1;
let page_fault_addr = trap_info.cr2 as Vaddr;
let page_fault_addr = trap_info.page_fault_addr as Vaddr;
trace!(
"page fault error code: 0x{:x}, Page fault address: 0x{:x}",
trap_info.err,
trap_info.error_code,
page_fault_addr
);
let not_present = trap_info.err & PAGE_NOT_PRESENT_ERROR_MASK == 0;
let write = trap_info.err & WRITE_ACCESS_MASK != 0;
let not_present = trap_info.error_code & PAGE_NOT_PRESENT_ERROR_MASK == 0;
let write = trap_info.error_code & WRITE_ACCESS_MASK != 0;
if not_present || write {
// If page is not present or due to write access, we should ask the vmar try to commit this page
let current = current!();
@ -54,7 +54,7 @@ fn handle_page_fault(trap_info: &TrapInformation) {
}
/// generate a fault signal for current process.
fn generate_fault_signal(trap_info: &TrapInformation) {
fn generate_fault_signal(trap_info: &CpuExceptionInfo) {
let current = current!();
let signal = Box::new(FaultSignal::new(trap_info));
current.enqueue_signal(signal);
@ -65,12 +65,12 @@ macro_rules! log_trap_common {
trace!(
"[Trap][{}][err = {}]",
stringify!($exception_name),
$trap_info.err
$trap_info.error_code
)
};
}
fn log_trap_info(exception: &CpuException, trap_info: &TrapInformation) {
fn log_trap_info(exception: &CpuException, trap_info: &CpuExceptionInfo) {
match *exception {
DIVIDE_BY_ZERO => log_trap_common!(DIVIDE_BY_ZERO, trap_info),
DEBUG => log_trap_common!(DEBUG, trap_info),
@ -90,8 +90,8 @@ fn log_trap_info(exception: &CpuException, trap_info: &TrapInformation) {
trace!(
"[Trap][{}][page fault addr = 0x{:x}, err = {}]",
stringify!(PAGE_FAULT),
trap_info.cr2,
trap_info.err
trap_info.page_fault_addr,
trap_info.error_code
);
}
// 15 reserved
@ -109,7 +109,7 @@ fn log_trap_info(exception: &CpuException, trap_info: &TrapInformation) {
_ => {
info!(
"[Trap][Unknown trap type][id = {}, err = {}]",
trap_info.id, trap_info.err
trap_info.id, trap_info.error_code
);
}
}