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Boot application processors into spin loops

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Co-authored-by: Chuandong Li <lichuand@pku.edu.cn>
This commit is contained in:
Zhang Junyang
2024-07-06 04:43:33 +00:00
committed by Tate, Hongliang Tian
parent 870d542f60
commit 393c9019c0
21 changed files with 828 additions and 123 deletions
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7
ostd/src/arch/x86/kernel/apic/xapic.rs
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@ -2,11 +2,10 @@
#![allow(dead_code)]
use spin::Once;
use x86::apic::xapic;
use super::ApicTimer;
use crate::{mm, sync::Mutex};
use crate::mm;
const IA32_APIC_BASE_MSR: u32 = 0x1B;
const IA32_APIC_BASE_MSR_BSP: u32 = 0x100; // Processor is a BSP
@ -14,8 +13,6 @@ const IA32_APIC_BASE_MSR_ENABLE: u64 = 0x800;
const APIC_LVT_MASK_BITS: u32 = 1 << 16;
pub static XAPIC_INSTANCE: Once<Mutex<XApic>> = Once::new();
#[derive(Debug)]
pub struct XApic {
mmio_region: &'static mut [u32],
@ -56,7 +53,7 @@ impl XApic {
self.write(xapic::XAPIC_SVR, svr);
}
pub fn has_xapic() -> bool {
pub(super) fn has_xapic() -> bool {
let value = unsafe { core::arch::x86_64::__cpuid(1) };
value.edx & 0x100 != 0
}