Samuka007/asterinas
1
0
Fork 0
mirror of https://github.com/asterinas/asterinas.git synced 2025-06-24 01:43:22 +00:00
Code Issues Packages Projects Releases Wiki Activity

Strict TLB coherence

Browse Source
This commit is contained in:
Zhang Junyang
2025-03-21 17:22:05 +08:00
committed by Tate, Hongliang Tian
parent 30ec0be210
commit 4f0acddfd4
8 changed files with 109 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
kernel/src/vm/vmar/mod.rs
View File

@ -457,6 +457,7 @@ impl Vmar_ {
}
cur_cursor.flusher().issue_tlb_flush(TlbFlushOp::All);
cur_cursor.flusher().dispatch_tlb_flush();
cur_cursor.flusher().sync_tlb_flush();
}
Ok(new_vmar_)

4
kernel/src/vm/vmar/vm_mapping.rs
View File

@ -188,6 +188,7 @@ impl VmMapping {
prop.flags |= new_flags;
cursor.map(new_frame.into(), prop);
}
cursor.flusher().sync_tlb_flush();
}
VmItem::NotMapped { .. } => {
// Map a new frame to the page fault address.
@ -385,6 +386,8 @@ impl VmMapping {
let range = self.range();
let mut cursor = vm_space.cursor_mut(&range)?;
cursor.unmap(range.len());
cursor.flusher().dispatch_tlb_flush();
cursor.flusher().sync_tlb_flush();
Ok(())
}
@ -404,6 +407,7 @@ impl VmMapping {
}
}
cursor.flusher().dispatch_tlb_flush();
cursor.flusher().sync_tlb_flush();
Self { perms, ..self }
}