mirror of
https://github.com/asterinas/asterinas.git
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Add tdx early init and ve handler functions
This commit is contained in:
committed by
Tate, Hongliang Tian
parent
d7710207bb
commit
4f0df44b29
@ -6,6 +6,8 @@ use core::fmt::Debug;
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use trapframe::{GeneralRegs, UserContext as RawUserContext};
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use log::debug;
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#[cfg(feature = "intel_tdx")]
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use tdx_guest::{serial_println, tdcall, tdvmcall, TdxVirtualExceptionType};
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use x86_64::registers::rflags::RFlags;
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use crate::trap::call_irq_callback_functions;
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@ -39,6 +41,75 @@ pub struct TrapInformation {
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pub err: usize,
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}
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#[cfg(feature = "intel_tdx")]
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pub fn virtual_exception_handler(trapframe: &mut GeneralRegs, ve_info: &tdcall::TdgVeInfo) {
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match ve_info.exit_reason.into() {
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TdxVirtualExceptionType::Hlt => {
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serial_println!("Ready to halt");
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tdvmcall::hlt();
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}
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TdxVirtualExceptionType::Io => {
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if !handle_ve_io(trapframe, ve_info) {
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serial_println!("Handle tdx ioexit errors, ready to halt");
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tdvmcall::hlt();
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}
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}
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TdxVirtualExceptionType::MsrRead => {
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let msr = tdvmcall::rdmsr(trapframe.rcx as u32).unwrap();
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trapframe.rax = (msr as u32 & u32::MAX) as usize;
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trapframe.rdx = ((msr >> 32) as u32 & u32::MAX) as usize;
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}
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TdxVirtualExceptionType::MsrWrite => {
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let data = trapframe.rax as u64 | ((trapframe.rdx as u64) << 32);
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tdvmcall::wrmsr(trapframe.rcx as u32, data).unwrap();
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}
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TdxVirtualExceptionType::CpuId => {
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let cpuid_info = tdvmcall::cpuid(trapframe.rax as u32, trapframe.rcx as u32).unwrap();
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let mask = 0xFFFF_FFFF_0000_0000_usize;
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trapframe.rax = (trapframe.rax & mask) | cpuid_info.eax;
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trapframe.rbx = (trapframe.rbx & mask) | cpuid_info.ebx;
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trapframe.rcx = (trapframe.rcx & mask) | cpuid_info.ecx;
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trapframe.rdx = (trapframe.rdx & mask) | cpuid_info.edx;
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}
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TdxVirtualExceptionType::Other => panic!("Unknown TDX vitrual exception type"),
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_ => return,
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}
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trapframe.rip = trapframe.rip + ve_info.exit_instruction_length as usize;
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}
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#[cfg(feature = "intel_tdx")]
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pub fn handle_ve_io(trapframe: &mut GeneralRegs, ve_info: &tdcall::TdgVeInfo) -> bool {
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let size = match ve_info.exit_qualification & 0x3 {
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0 => 1,
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1 => 2,
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3 => 4,
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_ => panic!("Invalid size value"),
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};
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let direction = if (ve_info.exit_qualification >> 3) & 0x1 == 0 {
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tdvmcall::Direction::Out
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} else {
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tdvmcall::Direction::In
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};
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let string = (ve_info.exit_qualification >> 4) & 0x1 == 1;
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let repeat = (ve_info.exit_qualification >> 5) & 0x1 == 1;
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let operand = if (ve_info.exit_qualification >> 6) & 0x1 == 0 {
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tdvmcall::Operand::Dx
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} else {
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tdvmcall::Operand::Immediate
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};
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let port = (ve_info.exit_qualification >> 16) as u16;
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match direction {
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tdvmcall::Direction::In => {
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trapframe.rax = tdvmcall::io_read(size, port).unwrap() as usize;
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}
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tdvmcall::Direction::Out => {
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tdvmcall::io_write(size, port, trapframe.rax as u32).unwrap();
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}
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};
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true
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}
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impl UserContext {
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pub fn general_regs(&self) -> &GeneralRegs {
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&self.user_context.general
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@ -73,6 +144,13 @@ impl UserContextApiInternal for UserContext {
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self.user_context.run();
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match CpuException::to_cpu_exception(self.user_context.trap_num as u16) {
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Some(exception) => {
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#[cfg(feature = "intel_tdx")]
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if *exception == VIRTUALIZATION_EXCEPTION {
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let ve_info =
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tdcall::get_veinfo().expect("#VE handler: fail to get VE info\n");
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virtual_exception_handler(self.general_regs_mut(), &ve_info);
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continue;
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}
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if exception.typ == CpuExceptionType::FaultOrTrap
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|| exception.typ == CpuExceptionType::Fault
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|| exception.typ == CpuExceptionType::Trap
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@ -40,6 +40,8 @@ pub use self::prelude::Result;
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use alloc::vec::Vec;
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use arch::irq::{IrqCallbackHandle, IrqLine};
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use core::{mem, panic::PanicInfo};
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#[cfg(feature = "intel_tdx")]
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use tdx_guest::tdx_early_init;
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use trapframe::TrapFrame;
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static mut IRQ_CALLBACK_LIST: Vec<IrqCallbackHandle> = Vec::new();
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@ -47,6 +49,13 @@ static mut IRQ_CALLBACK_LIST: Vec<IrqCallbackHandle> = Vec::new();
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pub fn init() {
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arch::before_all_init();
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logger::init();
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#[cfg(feature = "intel_tdx")]
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let td_info = tdx_early_init().unwrap();
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#[cfg(feature = "intel_tdx")]
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println!(
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"td gpaw: {}, td attributes: {:?}\nTDX guest is initialized",
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td_info.gpaw, td_info.attributes
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);
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vm::heap_allocator::init();
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boot::init();
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vm::init();
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@ -1,14 +1,92 @@
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use crate::{arch::irq::IRQ_LIST, cpu::CpuException};
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#[cfg(feature = "intel_tdx")]
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use tdx_guest::{serial_println, tdcall, tdvmcall, TdxVirtualExceptionType};
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use trapframe::TrapFrame;
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#[cfg(feature = "intel_tdx")]
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pub fn virtual_exception_handler(trapframe: &mut TrapFrame, ve_info: &tdcall::TdgVeInfo) {
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match ve_info.exit_reason.into() {
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TdxVirtualExceptionType::Hlt => {
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serial_println!("Ready to halt");
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tdvmcall::hlt();
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}
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TdxVirtualExceptionType::Io => {
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if !handle_ve_io(trapframe, ve_info) {
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serial_println!("Handle tdx ioexit errors, ready to halt");
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tdvmcall::hlt();
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}
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}
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TdxVirtualExceptionType::MsrRead => {
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let msr = tdvmcall::rdmsr(trapframe.rcx as u32).unwrap();
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trapframe.rax = (msr as u32 & u32::MAX) as usize;
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trapframe.rdx = ((msr >> 32) as u32 & u32::MAX) as usize;
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}
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TdxVirtualExceptionType::MsrWrite => {
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let data = trapframe.rax as u64 | ((trapframe.rdx as u64) << 32);
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tdvmcall::wrmsr(trapframe.rcx as u32, data).unwrap();
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}
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TdxVirtualExceptionType::CpuId => {
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let cpuid_info = tdvmcall::cpuid(trapframe.rax as u32, trapframe.rcx as u32).unwrap();
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let mask = 0xFFFF_FFFF_0000_0000_usize;
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trapframe.rax = (trapframe.rax & mask) | cpuid_info.eax;
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trapframe.rbx = (trapframe.rbx & mask) | cpuid_info.ebx;
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trapframe.rcx = (trapframe.rcx & mask) | cpuid_info.ecx;
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trapframe.rdx = (trapframe.rdx & mask) | cpuid_info.edx;
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}
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TdxVirtualExceptionType::Other => panic!("Unknown TDX vitrual exception type"),
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_ => return,
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}
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trapframe.rip = trapframe.rip + ve_info.exit_instruction_length as usize;
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}
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#[cfg(feature = "intel_tdx")]
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pub fn handle_ve_io(trapframe: &mut TrapFrame, ve_info: &tdcall::TdgVeInfo) -> bool {
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let size = match ve_info.exit_qualification & 0x3 {
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0 => 1,
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1 => 2,
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3 => 4,
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_ => panic!("Invalid size value"),
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};
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let direction = if (ve_info.exit_qualification >> 3) & 0x1 == 0 {
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tdvmcall::Direction::Out
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} else {
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tdvmcall::Direction::In
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};
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let string = (ve_info.exit_qualification >> 4) & 0x1 == 1;
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let repeat = (ve_info.exit_qualification >> 5) & 0x1 == 1;
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let operand = if (ve_info.exit_qualification >> 6) & 0x1 == 0 {
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tdvmcall::Operand::Dx
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} else {
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tdvmcall::Operand::Immediate
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};
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let port = (ve_info.exit_qualification >> 16) as u16;
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match direction {
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tdvmcall::Direction::In => {
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trapframe.rax = tdvmcall::io_read(size, port).unwrap() as usize;
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}
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tdvmcall::Direction::Out => {
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tdvmcall::io_write(size, port, trapframe.rax as u32).unwrap();
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}
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};
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true
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}
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/// Only from kernel
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#[no_mangle]
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extern "sysv64" fn trap_handler(f: &mut TrapFrame) {
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if CpuException::is_cpu_exception(f.trap_num as u16) {
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#[cfg(feature = "intel_tdx")]
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if f.trap_num as u16 == 20 {
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let ve_info = tdcall::get_veinfo().expect("#VE handler: fail to get VE info\n");
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virtual_exception_handler(f, &ve_info);
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}
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#[cfg(not(feature = "intel_tdx"))]
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panic!("cannot handle kernel cpu fault now, information:{:#x?}", f);
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} else {
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call_irq_callback_functions(f);
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}
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call_irq_callback_functions(f);
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}
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pub(crate) fn call_irq_callback_functions(trap_frame: &TrapFrame) {
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