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Add RISC-V base support
This commit is contained in:
committed by
Tate, Hongliang Tian
parent
839c2a6689
commit
4fa0e6334b
@ -104,6 +104,7 @@ pub fn init() {
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util::random::init();
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driver::init();
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time::init();
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#[cfg(target_arch = "x86_64")]
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net::init();
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sched::init();
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fs::rootfs::init(boot::initramfs()).unwrap();
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@ -141,6 +142,7 @@ fn init_thread() {
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// Work queue should be initialized before interrupt is enabled,
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// in case any irq handler uses work queue as bottom half
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thread::work_queue::init();
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#[cfg(target_arch = "x86_64")]
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net::lazy_init();
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fs::lazy_init();
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ipc::init();
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