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Change MMIO access in IoApic to VolatileRef

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This commit is contained in:
Yuke Peng
2025-03-02 17:29:34 +08:00
committed by Tate, Hongliang Tian
parent 55ee4bda2c
commit 51216daec6
1 changed files with 16 additions and 23 deletions
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39
ostd/src/arch/x86/kernel/apic/ioapic.rs
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@ -3,12 +3,17 @@
#![expect(dead_code)] #![expect(dead_code)]
use alloc::{vec, vec::Vec}; use alloc::{vec, vec::Vec};
use core::ptr::NonNull;
use acpi::PlatformInfo; use acpi::PlatformInfo;
use bit_field::BitField; use bit_field::BitField;
use cfg_if::cfg_if; use cfg_if::cfg_if;
use log::info; use log::info;
use spin::Once; use spin::Once;
use volatile::{
access::{ReadWrite, WriteOnly},
VolatileRef,
};
use crate::{ use crate::{
arch::{iommu::has_interrupt_remapping, x86::kernel::acpi::ACPI_TABLES}, arch::{iommu::has_interrupt_remapping, x86::kernel::acpi::ACPI_TABLES},
@ -117,7 +122,7 @@ impl IoApic {
} }
pub fn vaddr(&self) -> usize { pub fn vaddr(&self) -> usize {
self.access.register.addr() self.access.register.as_ptr().as_raw_ptr().addr().get()
} }
fn new(io_apic_access: IoApicAccess, interrupt_base: u32) -> Self { fn new(io_apic_access: IoApicAccess, interrupt_base: u32) -> Self {
@ -130,8 +135,8 @@ impl IoApic {
} }
struct IoApicAccess { struct IoApicAccess {
register: *mut u32, register: VolatileRef<'static, u32, WriteOnly>,
data: *mut u32, data: VolatileRef<'static, u32, ReadWrite>,
} }
impl IoApicAccess { impl IoApicAccess {
@ -139,27 +144,20 @@ impl IoApicAccess {
/// ///
/// User must ensure the base address is valid. /// User must ensure the base address is valid.
unsafe fn new(base_address: usize) -> Self { unsafe fn new(base_address: usize) -> Self {
let vaddr = paddr_to_vaddr(base_address); let base = NonNull::new(paddr_to_vaddr(base_address) as *mut u8).unwrap();
Self { let register = VolatileRef::new_restricted(WriteOnly, base.cast::<u32>());
register: vaddr as *mut u32, let data = VolatileRef::new(base.add(0x10).cast::<u32>());
data: (vaddr + 0x10) as *mut u32, Self { register, data }
}
} }
pub fn read(&mut self, register: u8) -> u32 { pub fn read(&mut self, register: u8) -> u32 {
// SAFETY: Since the base address is valid, the read/write should be safe. self.register.as_mut_ptr().write(register as u32);
unsafe { self.data.as_ptr().read()
self.register.write_volatile(register as u32);
self.data.read_volatile()
}
} }
pub fn write(&mut self, register: u8, data: u32) { pub fn write(&mut self, register: u8, data: u32) {
// SAFETY: Since the base address is valid, the read/write should be safe. self.register.as_mut_ptr().write(register as u32);
unsafe { self.data.as_mut_ptr().write(data);
self.register.write_volatile(register as u32);
self.data.write_volatile(data);
}
} }
pub fn id(&mut self) -> u8 { pub fn id(&mut self) -> u8 {
@ -179,11 +177,6 @@ impl IoApicAccess {
} }
} }
/// # Safety: The pointer inside the IoApic will not change
unsafe impl Send for IoApic {}
/// # Safety: The pointer inside the IoApic will not change
unsafe impl Sync for IoApic {}
pub static IO_APIC: Once<Vec<SpinLock<IoApic>>> = Once::new(); pub static IO_APIC: Once<Vec<SpinLock<IoApic>>> = Once::new();
pub fn init() { pub fn init() {