diff --git a/kernel/aster-nix/src/device/mod.rs b/kernel/aster-nix/src/device/mod.rs
index 131e9b351..b845f5caf 100644
--- a/kernel/aster-nix/src/device/mod.rs
+++ b/kernel/aster-nix/src/device/mod.rs
@@ -3,7 +3,7 @@
 mod null;
 mod pty;
 mod random;
-#[cfg(feature = "intel_tdx")]
+#[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
 mod tdxguest;
 pub mod tty;
 mod urandom;
@@ -11,9 +11,9 @@ mod zero;
 
 pub use pty::{new_pty_pair, PtyMaster, PtySlave};
 pub use random::Random;
-#[cfg(feature = "intel_tdx")]
+#[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
 use tdx_guest::tdx_is_enabled;
-#[cfg(feature = "intel_tdx")]
+#[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
 pub use tdxguest::TdxGuest;
 pub use urandom::Urandom;
 
@@ -34,9 +34,9 @@ pub fn init() -> Result<()> {
     add_node(console, "console")?;
     let tty = Arc::new(tty::TtyDevice);
     add_node(tty, "tty")?;
-    #[cfg(feature = "intel_tdx")]
+    #[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
     let tdx_guest = Arc::new(tdxguest::TdxGuest);
-    #[cfg(feature = "intel_tdx")]
+    #[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
     if tdx_is_enabled() {
         add_node(tdx_guest, "tdx_guest")?;
     }
diff --git a/ostd/Cargo.toml b/ostd/Cargo.toml
index b5e623f85..f37404cb2 100644
--- a/ostd/Cargo.toml
+++ b/ostd/Cargo.toml
@@ -40,7 +40,6 @@ owo-colors = { version = "3", optional = true }
 ostd-pod = { git = "https://github.com/asterinas/ostd-pod", rev = "c4644be", version = "0.1.1" }
 spin = "0.9.4"
 static_assertions = "1.1.0"
-tdx-guest = { version = "0.1.5", optional = true }
 trapframe = "0.10.0"
 unwinding = { version = "0.2.2", default-features = false, features = ["fde-gnu-eh-frame-hdr", "hide-trace", "panic", "personality", "unwinder"] }
 volatile = { version = "0.4.5", features = ["unstable"] }
@@ -58,6 +57,7 @@ iced-x86 = { version = "1.21.0", default-features = false, features = [
     "decoder",
     "gas",
 ], optional = true }
+tdx-guest = { version = "0.1.5", optional = true }
 
 [features]
 default = ["intel_tdx", "log_color"]
diff --git a/ostd/src/bus/mmio/mod.rs b/ostd/src/bus/mmio/mod.rs
index 67072ec32..7a433e02b 100644
--- a/ostd/src/bus/mmio/mod.rs
+++ b/ostd/src/bus/mmio/mod.rs
@@ -10,12 +10,12 @@ pub mod common_device;
 use alloc::vec::Vec;
 use core::ops::Range;
 
-#[cfg(feature = "intel_tdx")]
+#[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
 use ::tdx_guest::tdx_is_enabled;
 use log::debug;
 
 use self::bus::MmioBus;
-#[cfg(feature = "intel_tdx")]
+#[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
 use crate::arch::tdx_guest;
 use crate::{
     arch::kernel::IO_APIC, bus::mmio::common_device::MmioCommonDevice, mm::paddr_to_vaddr,
@@ -29,7 +29,7 @@ pub static MMIO_BUS: SpinLock<MmioBus> = SpinLock::new(MmioBus::new());
 static IRQS: SpinLock<Vec<IrqLine>> = SpinLock::new(Vec::new());
 
 pub(crate) fn init() {
-    #[cfg(feature = "intel_tdx")]
+    #[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
     // SAFETY:
     // This is safe because we are ensuring that the address range 0xFEB0_0000 to 0xFEB0_4000 is valid before this operation.
     // The address range is page-aligned and falls within the MMIO range, which is a requirement for the `unprotect_gpa_range` function.
diff --git a/ostd/src/bus/pci/capability/msix.rs b/ostd/src/bus/pci/capability/msix.rs
index 6fe68411d..ace2f6181 100644
--- a/ostd/src/bus/pci/capability/msix.rs
+++ b/ostd/src/bus/pci/capability/msix.rs
@@ -7,10 +7,10 @@
 
 use alloc::{sync::Arc, vec::Vec};
 
-#[cfg(feature = "intel_tdx")]
+#[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
 use ::tdx_guest::tdx_is_enabled;
 
-#[cfg(feature = "intel_tdx")]
+#[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
 use crate::arch::tdx_guest;
 use crate::{
     bus::pci::{
@@ -100,7 +100,7 @@ impl CapabilityMsixData {
 
         // Set message address 0xFEE0_0000
         for i in 0..table_size {
-            #[cfg(feature = "intel_tdx")]
+            #[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
             // SAFETY:
             // This is safe because we are ensuring that the physical address of the MSI-X table is valid before this operation.
             // We are also ensuring that we are only unprotecting a single page.
diff --git a/ostd/src/mm/dma/dma_coherent.rs b/ostd/src/mm/dma/dma_coherent.rs
index 93f741fec..0b5007ef6 100644
--- a/ostd/src/mm/dma/dma_coherent.rs
+++ b/ostd/src/mm/dma/dma_coherent.rs
@@ -3,11 +3,11 @@
 use alloc::sync::Arc;
 use core::ops::Deref;
 
-#[cfg(feature = "intel_tdx")]
+#[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
 use ::tdx_guest::tdx_is_enabled;
 
 use super::{check_and_insert_dma_mapping, remove_dma_mapping, DmaError, HasDaddr};
-#[cfg(feature = "intel_tdx")]
+#[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
 use crate::arch::tdx_guest;
 use crate::{
     arch::{iommu, mm::tlb_flush_addr_range},
@@ -74,7 +74,7 @@ impl DmaCoherent {
         }
         let start_daddr = match dma_type() {
             DmaType::Direct => {
-                #[cfg(feature = "intel_tdx")]
+                #[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
                 // SAFETY:
                 // This is safe because we are ensuring that the physical address range specified by `start_paddr` and `frame_count` is valid before these operations.
                 // The `check_and_insert_dma_mapping` function checks if the physical address range is already mapped.
@@ -129,7 +129,7 @@ impl Drop for DmaCoherentInner {
         start_paddr.checked_add(frame_count * PAGE_SIZE).unwrap();
         match dma_type() {
             DmaType::Direct => {
-                #[cfg(feature = "intel_tdx")]
+                #[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
                 // SAFETY:
                 // This is safe because we are ensuring that the physical address range specified by `start_paddr` and `frame_count` is valid before these operations.
                 // The `start_paddr()` ensures the `start_paddr` is page-aligned.
diff --git a/ostd/src/mm/dma/dma_stream.rs b/ostd/src/mm/dma/dma_stream.rs
index 88f7beb9f..841e22337 100644
--- a/ostd/src/mm/dma/dma_stream.rs
+++ b/ostd/src/mm/dma/dma_stream.rs
@@ -3,11 +3,11 @@
 use alloc::sync::Arc;
 use core::ops::Range;
 
-#[cfg(feature = "intel_tdx")]
+#[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
 use ::tdx_guest::tdx_is_enabled;
 
 use super::{check_and_insert_dma_mapping, remove_dma_mapping, DmaError, HasDaddr};
-#[cfg(feature = "intel_tdx")]
+#[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
 use crate::arch::tdx_guest;
 use crate::{
     arch::iommu,
@@ -68,7 +68,7 @@ impl DmaStream {
         start_paddr.checked_add(frame_count * PAGE_SIZE).unwrap();
         let start_daddr = match dma_type() {
             DmaType::Direct => {
-                #[cfg(feature = "intel_tdx")]
+                #[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
                 // SAFETY:
                 // This is safe because we are ensuring that the physical address range specified by `start_paddr` and `frame_count` is valid before these operations.
                 // The `check_and_insert_dma_mapping` function checks if the physical address range is already mapped.
@@ -173,7 +173,7 @@ impl Drop for DmaStreamInner {
         start_paddr.checked_add(frame_count * PAGE_SIZE).unwrap();
         match dma_type() {
             DmaType::Direct => {
-                #[cfg(feature = "intel_tdx")]
+                #[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
                 // SAFETY:
                 // This is safe because we are ensuring that the physical address range specified by `start_paddr` and `frame_count` is valid before these operations.
                 // The `start_paddr()` ensures the `start_paddr` is page-aligned.
diff --git a/ostd/src/mm/page_prop.rs b/ostd/src/mm/page_prop.rs
index 7bb028ed1..1faa6abff 100644
--- a/ostd/src/mm/page_prop.rs
+++ b/ostd/src/mm/page_prop.rs
@@ -128,7 +128,7 @@ bitflags! {
 
         /// (TEE only) If the page is shared with the host.
         /// Otherwise the page is ensured confidential and not visible outside the guest.
-        #[cfg(feature = "intel_tdx")]
+        #[cfg(all(target_arch = "x86_64", feature = "intel_tdx"))]
         const SHARED    = 0b10000000;
     }
 }