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Support IOMMU
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committed by
Tate, Hongliang Tian
parent
829575b3a6
commit
a47b98b160
283
framework/jinux-frame/src/arch/x86/kernel/acpi/remapping.rs
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283
framework/jinux-frame/src/arch/x86/kernel/acpi/remapping.rs
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//! Remapping structures of DMAR table.
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//! This file defines these structures and provides a "Debug" implementation to see the value inside these structures.
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//! Most of the introduction are copied from Intel vt-directed-io-specification.
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use core::{fmt::Debug, mem::size_of};
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use alloc::{string::String, vec::Vec};
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/// DMA-remapping hardware unit definition (DRHD).
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///
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/// A DRHD structure uniquely represents a remapping hardware unit present in the platform.
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/// There must be at least one instance of this structure for each
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/// PCI segment in the platform.
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#[derive(Debug, Clone)]
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pub struct Drhd {
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header: DrhdHeader,
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device_scopes: Vec<DeviceScope>,
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}
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impl Drhd {
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pub fn register_base_addr(&self) -> u64 {
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self.header.register_base_addr
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}
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}
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#[repr(C)]
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#[derive(Debug, Clone, Copy)]
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pub struct DrhdHeader {
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typ: u16,
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length: u16,
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flags: u8,
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size: u8,
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segment_num: u16,
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register_base_addr: u64,
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}
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/// Reserved Memory Region Reporting (RMRR).
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///
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/// BIOS allocated reserved memory ranges that may be DMA targets.
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/// It may report each such reserved memory region through the RMRR structures, along
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/// with the devices that requires access to the specified reserved memory region.
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#[derive(Debug, Clone)]
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pub struct Rmrr {
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header: RmrrHeader,
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device_scopes: Vec<DeviceScope>,
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}
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#[repr(C)]
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#[derive(Debug, Clone, Copy)]
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pub struct RmrrHeader {
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typ: u16,
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length: u16,
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reserved: u16,
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segment_num: u16,
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reserved_memory_region_base_addr: u64,
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reserved_memory_region_limit_addr: u64,
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}
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/// Root Port ATS Capability Reporting (ATSR).
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///
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/// This structure is applicable only for platforms supporting Device-TLBs as reported through the
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/// Extended Capability Register.
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#[derive(Debug, Clone)]
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pub struct Atsr {
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header: AtsrHeader,
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device_scopes: Vec<DeviceScope>,
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}
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#[repr(C)]
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#[derive(Debug, Clone, Copy)]
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pub struct AtsrHeader {
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typ: u16,
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length: u16,
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flags: u8,
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reserved: u8,
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segment_num: u16,
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}
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/// Remapping Hardware Status Affinity (RHSA).
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///
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/// It is applicable for platforms supporting non-uniform memory (NUMA), where Remapping hardware units spans across nodes.
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/// This optional structure provides the association between each Remapping hardware unit (identified by its
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/// espective Base Address) and the proximity domain to which that hardware unit belongs.
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#[repr(C)]
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#[derive(Debug, Clone, Copy)]
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pub struct Rhsa {
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typ: u16,
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length: u16,
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flags: u32,
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register_base_addr: u64,
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proximity_domain: u32,
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}
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/// ACPI Name-space Device Declaration (ANDD).
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///
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/// An ANDD structure uniquely represents an ACPI name-space
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/// enumerated device capable of issuing DMA requests in the platform.
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#[derive(Debug, Clone)]
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pub struct Andd {
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header: AnddHeader,
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acpi_object_name: String,
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}
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#[repr(C)]
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#[derive(Debug, Clone, Copy)]
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pub struct AnddHeader {
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typ: u16,
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length: u16,
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reserved: [u8; 3],
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acpi_device_num: u8,
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}
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/// SoC Integrated Address Translation Cache (SATC).
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///
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/// The SATC reporting structure identifies devices that have address translation cache (ATC),
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/// as defined by the PCI Express Base Specification.
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#[derive(Debug, Clone)]
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pub struct Satc {
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header: SatcHeader,
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device_scopes: Vec<DeviceScope>,
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}
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#[repr(C)]
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#[derive(Debug, Clone, Copy)]
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pub struct SatcHeader {
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typ: u16,
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length: u16,
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flags: u8,
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reserved: u8,
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segment_num: u16,
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}
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/// SoC Integrated Device Property Reporting (SIDP).
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///
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/// The (SIDP) reporting structure identifies devices that have special
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/// properties and that may put restrictions on how system software must configure remapping
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/// structures that govern such devices in a platform where remapping hardware is enabled.
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///
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#[derive(Debug, Clone)]
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pub struct Sidp {
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header: SidpHeader,
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device_scopes: Vec<DeviceScope>,
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}
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#[repr(C)]
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#[derive(Debug, Clone, Copy)]
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pub struct SidpHeader {
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typ: u16,
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length: u16,
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reserved: u16,
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segment_num: u16,
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}
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/// The Device Scope Structure is made up of Device Scope Entries. Each Device Scope Entry may be
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/// used to indicate a PCI endpoint device
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#[derive(Debug, Clone)]
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pub struct DeviceScope {
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header: DeviceScopeHeader,
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path: Vec<(u8, u8)>,
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}
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#[repr(C)]
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#[derive(Debug, Clone, Copy)]
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pub struct DeviceScopeHeader {
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typ: u8,
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length: u8,
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flags: u8,
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reserved: u8,
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enum_id: u8,
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start_bus_number: u8,
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}
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macro_rules! impl_from_bytes {
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($(($struct:tt,$header_struct:tt,$dst_name:ident)),*) => {
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$(impl $struct {
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/// Create instance from bytes
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///
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/// # Safety
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///
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/// User must ensure the bytes is valid.
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///
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pub unsafe fn from_bytes(bytes: &[u8]) -> Self {
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let length = u16_from_slice(&bytes[2..4]) as usize;
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debug_assert_eq!(length, bytes.len());
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let mut index = core::mem::size_of::<$header_struct>();
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let mut remain_length = length - core::mem::size_of::<$header_struct>();
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let mut $dst_name = Vec::new();
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while remain_length > 0 {
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let length = *bytes[index + 1..index + 2].as_ptr() as usize;
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let temp = DeviceScope::from_bytes(
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&bytes[index..index + length],
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);
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$dst_name.push(temp);
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index += length;
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remain_length -= length;
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}
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let header = *(bytes.as_ptr() as *const $header_struct);
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Self{
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header,
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$dst_name
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}
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}
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})*
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};
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}
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impl_from_bytes!(
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(Drhd, DrhdHeader, device_scopes),
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(Rmrr, RmrrHeader, device_scopes),
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(Atsr, AtsrHeader, device_scopes),
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(Satc, SatcHeader, device_scopes),
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(Sidp, SidpHeader, device_scopes)
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);
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impl DeviceScope {
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/// Create instance from bytes
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///
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/// # Safety
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///
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/// User must ensure the bytes is valid.
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///
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unsafe fn from_bytes(bytes: &[u8]) -> Self {
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let length = bytes[1] as u32;
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debug_assert_eq!(length, bytes.len() as u32);
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let header = *(bytes.as_ptr() as *const DeviceScopeHeader);
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let mut index = size_of::<DeviceScopeHeader>();
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let mut remain_length = length - index as u32;
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let mut path = Vec::new();
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while remain_length > 0 {
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let temp: (u8, u8) = *(bytes[index..index + 2].as_ptr() as *const (u8, u8));
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path.push(temp);
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index += 2;
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remain_length -= 2;
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}
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Self { header, path }
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}
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}
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impl Rhsa {
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/// Create instance from bytes
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///
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/// # Safety
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///
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/// User must ensure the bytes is valid.
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///
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pub unsafe fn from_bytes(bytes: &[u8]) -> Self {
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let length = u16_from_slice(&bytes[2..4]) as u32;
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debug_assert_eq!(length, bytes.len() as u32);
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let result = *(bytes.as_ptr() as *const Self);
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result
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}
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}
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impl Andd {
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/// Create instance from bytes
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///
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/// # Safety
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///
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/// User must ensure the bytes is valid.
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///
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pub unsafe fn from_bytes(bytes: &[u8]) -> Self {
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let length = u16_from_slice(&bytes[2..4]) as usize;
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debug_assert_eq!(length, bytes.len());
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let index = core::mem::size_of::<AnddHeader>();
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let remain_length = length - core::mem::size_of::<AnddHeader>();
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let string = String::from_utf8(bytes[index..index + length].to_vec()).unwrap();
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let header = *(bytes.as_ptr() as *const AnddHeader);
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Self {
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header,
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acpi_object_name: string,
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}
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}
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}
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fn u16_from_slice(input: &[u8]) -> u16 {
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u16::from_ne_bytes(input[0..size_of::<u16>()].try_into().unwrap())
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}
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