From b3d30f7ac3b56d5200e0c48ae43848db79f04b10 Mon Sep 17 00:00:00 2001 From: Qingsong Chen Date: Mon, 4 Nov 2024 03:45:11 +0000 Subject: [PATCH] Fix pci config errors caused by expression precedence --- ostd/src/bus/pci/cfg_space.rs | 2 +- ostd/src/bus/pci/device_info.rs | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/ostd/src/bus/pci/cfg_space.rs b/ostd/src/bus/pci/cfg_space.rs index ef71e842..a8f2dcd5 100644 --- a/ostd/src/bus/pci/cfg_space.rs +++ b/ostd/src/bus/pci/cfg_space.rs @@ -237,7 +237,7 @@ impl MemoryBar { } }; // length - let size = !(len_encoded & !0xF).wrapping_add(1); + let size = (!(len_encoded & !0xF)).wrapping_add(1); let prefetchable = raw & 0b1000 != 0; // The BAR is located in I/O memory region Ok(MemoryBar { diff --git a/ostd/src/bus/pci/device_info.rs b/ostd/src/bus/pci/device_info.rs index b174218d..decce0fc 100644 --- a/ostd/src/bus/pci/device_info.rs +++ b/ostd/src/bus/pci/device_info.rs @@ -137,7 +137,7 @@ impl PciDeviceLocation { pub(super) fn write8(&self, offset: u16, val: u8) { let old = self.read32(offset & Self::BIT32_ALIGN_MASK); - let dest = offset as usize & 0b11 << 3; + let dest = (offset as usize & 0b11) << 3; let mask = (0xFF << dest) as u32; self.write32( offset & Self::BIT32_ALIGN_MASK, @@ -147,7 +147,7 @@ impl PciDeviceLocation { pub(super) fn write16(&self, offset: u16, val: u16) { let old = self.read32(offset & Self::BIT32_ALIGN_MASK); - let dest = offset as usize & 0b10 << 3; + let dest = (offset as usize & 0b10) << 3; let mask = (0xFFFF << dest) as u32; self.write32( offset & Self::BIT32_ALIGN_MASK,