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https://github.com/asterinas/asterinas.git
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Delete useless visibility for BARs
This commit is contained in:
parent
d3227df512
commit
b4a1dc03f3
@ -86,7 +86,7 @@ impl VirtioPciCapabilityData {
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offset,
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offset,
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length,
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length,
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option,
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option,
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memory_bar,
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memory_bar: memory_bar.cloned(),
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}
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}
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}
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}
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}
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}
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@ -95,7 +95,7 @@ impl VirtioPciLegacyTransport {
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};
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};
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info!("[Virtio]: Found device:{:?}", device_type);
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info!("[Virtio]: Found device:{:?}", device_type);
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let config_bar = common_device.bar_manager().bar(0).unwrap();
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let config_bar = common_device.bar_manager().bar(0).clone().unwrap();
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let mut num_queues = 0u16;
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let mut num_queues = 0u16;
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while num_queues < u16::MAX {
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while num_queues < u16::MAX {
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@ -73,10 +73,9 @@ impl CapabilityMsixData {
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let pba_bar;
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let pba_bar;
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let bar_manager = dev.bar_manager_mut();
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let bar_manager = dev.bar_manager_mut();
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bar_manager.set_invisible((pba_info & 0b111) as u8);
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bar_manager.set_invisible((table_info & 0b111) as u8);
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match bar_manager
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match bar_manager
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.bar_space_without_invisible((pba_info & 0b111) as u8)
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.bar((pba_info & 0b111) as u8)
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.clone()
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.expect("MSIX cfg:pba BAR is none")
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.expect("MSIX cfg:pba BAR is none")
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{
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{
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Bar::Memory(memory) => {
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Bar::Memory(memory) => {
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@ -87,7 +86,8 @@ impl CapabilityMsixData {
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}
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}
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};
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};
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match bar_manager
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match bar_manager
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.bar_space_without_invisible((table_info & 0b111) as u8)
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.bar((table_info & 0b111) as u8)
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.clone()
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.expect("MSIX cfg:table BAR is none")
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.expect("MSIX cfg:table BAR is none")
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{
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{
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Bar::Memory(memory) => {
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Bar::Memory(memory) => {
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@ -3,7 +3,6 @@
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//! PCI device common definitions or functions.
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//! PCI device common definitions or functions.
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#![expect(dead_code)]
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#![expect(dead_code)]
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#![expect(unused_variables)]
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use alloc::vec::Vec;
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use alloc::vec::Vec;
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@ -96,19 +95,14 @@ impl PciCommonDevice {
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/// Base Address Registers manager.
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/// Base Address Registers manager.
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#[derive(Debug)]
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#[derive(Debug)]
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pub struct BarManager {
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pub struct BarManager {
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/// BARs, the bool indicate whether this bar should exposed to unprivileged part.
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/// There are at most 6 BARs in PCI device.
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bars: [Option<(Bar, bool)>; 6],
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bars: [Option<Bar>; 6],
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}
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}
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impl BarManager {
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impl BarManager {
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/// Gain access to the BAR space and return None if that BAR is set to be invisible or absent.
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/// Gain access to the BAR space and return None if that BAR is absent.
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pub fn bar(&self, idx: u8) -> Option<Bar> {
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pub fn bar(&self, idx: u8) -> &Option<Bar> {
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let (bar, visible) = self.bars[idx as usize].clone()?;
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&self.bars[idx as usize]
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if visible {
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Some(bar)
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} else {
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None
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}
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}
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}
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/// Parse the BAR space by PCI device location.
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/// Parse the BAR space by PCI device location.
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@ -133,32 +127,11 @@ impl BarManager {
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}
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}
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Bar::Io(_) => {}
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Bar::Io(_) => {}
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}
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}
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bars[idx as usize] = Some((bar, true));
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bars[idx as usize] = Some(bar);
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idx += idx_step;
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idx += idx_step;
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}
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}
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idx += 1;
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idx += 1;
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}
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}
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Self { bars }
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Self { bars }
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}
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}
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pub(super) fn set_invisible(&mut self, idx: u8) {
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if self.bars[idx as usize].is_some() {
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let Some((bar, _)) = self.bars[idx as usize].clone() else {
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return;
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};
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self.bars[idx as usize] = Some((bar, false));
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}
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let Some((_, visible)) = self.bars[idx as usize] else {
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return;
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};
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}
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/// Gain access to the BAR space and return None if that BAR is absent.
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pub(super) fn bar_space_without_invisible(&self, idx: u8) -> Option<Bar> {
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if let Some((bar, _)) = self.bars[idx as usize].clone() {
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Some(bar)
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} else {
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None
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}
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}
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}
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}
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