mirror of
https://github.com/asterinas/asterinas.git
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Replace InFramePtr with SafePtr
This commit is contained in:
committed by
Tate, Hongliang Tian
parent
ab4b1b47dc
commit
c38e4f0800
@ -10,6 +10,7 @@ bitflags = "1.3"
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spin = "0.9.4"
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jinux-frame = { path = "../../../framework/jinux-frame" }
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jinux-util = { path = "../../libs/jinux-util" }
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jinux-rights = { path = "../../libs/jinux-rights" }
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pod = { git = "https://github.com/jinzhao-dev/pod", rev = "71e59ec" }
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component = { path = "../../libs/comp-sys/component" }
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log = "0.4"
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@ -1,3 +1,5 @@
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use core::mem::size_of;
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use alloc::vec::Vec;
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use log::debug;
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use pod::Pod;
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@ -6,8 +8,8 @@ use crate::util::{CSpaceAccessMethod, BAR};
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use super::capability::msix::CapabilityMSIXData;
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use jinux_frame::{bus::pci::PciDeviceLocation, offset_of, trap::IrqAllocateHandle};
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use jinux_util::frame_ptr::InFramePtr;
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use jinux_frame::{bus::pci::PciDeviceLocation, io_mem::IoMem, offset_of, trap::IrqAllocateHandle};
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use jinux_util::{field_ptr, safe_ptr::SafePtr};
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#[derive(Debug, Default)]
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pub struct MSIX {
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@ -19,7 +21,7 @@ pub struct MSIX {
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#[derive(Debug)]
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pub struct MSIXEntry {
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pub table_entry: InFramePtr<MSIXTableEntry>,
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pub table_entry: SafePtr<MSIXTableEntry, IoMem>,
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pub irq_handle: IrqAllocateHandle,
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}
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@ -83,22 +85,36 @@ impl MSIX {
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debug!("command after:{:x}", am.read16(loc, crate::PCI_COMMAND));
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let message_control = am.read16(loc, cap_ptr + 2) | 0x8000;
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am.write16(loc, cap_ptr + 2, message_control);
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let mut table_iter: InFramePtr<MSIXTableEntry> =
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InFramePtr::new(table_base_address as usize)
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.expect("can not get in frame ptr for msix");
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let mut table_iter: SafePtr<MSIXTableEntry, IoMem> = SafePtr::new(
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IoMem::new(
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table_base_address as usize
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..table_base_address as usize
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+ (size_of::<MSIXTableEntry>() * table_size as usize),
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)
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.unwrap(),
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0,
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);
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for _ in 0..table_size {
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// local APIC address: 0xFEE0_0000
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table_iter.write_at(offset_of!(MSIXTableEntry, msg_addr), 0xFEE0_0000 as u32);
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table_iter.write_at(offset_of!(MSIXTableEntry, msg_upper_addr), 0 as u32);
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field_ptr!(&table_iter, MSIXTableEntry, msg_addr)
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.write(&0xFEE0_0000u32)
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.unwrap();
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field_ptr!(&table_iter, MSIXTableEntry, msg_upper_addr)
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.write(&0u32)
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.unwrap();
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// allocate irq number
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let handle = jinux_frame::trap::allocate_irq().expect("not enough irq");
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table_iter.write_at(offset_of!(MSIXTableEntry, msg_data), handle.num() as u32);
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table_iter.write_at(offset_of!(MSIXTableEntry, vector_control), 0 as u32);
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field_ptr!(&table_iter, MSIXTableEntry, msg_data)
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.write(&(handle.num() as u32))
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.unwrap();
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field_ptr!(&table_iter, MSIXTableEntry, vector_control)
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.write(&0u32)
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.unwrap();
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cap.table.push(MSIXEntry {
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table_entry: table_iter.clone(),
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irq_handle: handle,
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});
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table_iter = table_iter.add(1);
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table_iter.add(1);
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}
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cap
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}
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