Adjust the format of imports in Asterinas

This commit is contained in:
Chen Chengjun
2024-02-25 22:09:24 +08:00
committed by Tate, Hongliang Tian
parent 92e488e727
commit cfcef6965a
384 changed files with 2264 additions and 2059 deletions

View File

@ -1,16 +1,15 @@
// SPDX-License-Identifier: MPL-2.0
use alloc::vec::Vec;
use core::{fmt::Debug, mem::size_of, slice::Iter};
use acpi::{sdt::Signature, AcpiTable};
use alloc::vec::Vec;
use crate::vm::paddr_to_vaddr;
use super::{
remapping::{Andd, Atsr, Drhd, Rhsa, Rmrr, Satc, Sidp},
SdtHeaderWrapper,
};
use crate::vm::paddr_to_vaddr;
/// DMA Remapping structure. When IOMMU is enabled, the structure should be present in the ACPI table,
/// and the user can use the DRHD table in this structure to obtain the register base addresses used to configure functions such as IOMMU.