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Don't run 16-bit code in the long mode
This commit is contained in:
Ruihan Li
Tate, Hongliang Tian
parent
ee28e199b7
commit
d3227df512
@ -2,89 +2,75 @@
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// The boot routine executed by the application processor.
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.global ap_boot_from_real_mode
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.global ap_boot_from_long_mode
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.extern boot_gdtr
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.extern boot_page_table_start
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.extern ap_early_entry
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.section ".ap_boot", "awx"
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.align 4096
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.code16
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IA32_APIC_BASE = 0x1B
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IA32_X2APIC_APICID = 0x802
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MMIO_XAPIC_APICID = 0xFEE00020
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start:
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cli // disable interrupts
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cld
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xor ax, ax // clear ax
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mov ds, ax // clear ds
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// In the Intel Trust Domain, the APs awakened by the operating system are in long mode.
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// We can determine this using the value of the CS register.
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// FIXME: This method will not affect the booting of linux-efi-handover64,
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// multiboot and multiboot2 in non-TDX environments.
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// However, it cannot guarantee the impact on other booting methods added in the future.
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mov ax, cs
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cmp ax, 0x38
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jne ap_real_mode_boot
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.code64
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ap_long_mode_tdx:
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// The Local APIC ID information is stored in r8d by Intel TDX Virtual Firmware.
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mov edi, r8d
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.macro setup_64bit_gdt_and_page_table eax
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// Use the 64-bit GDT.
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lgdt [boot_gdtr]
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// Enable PAE and PGE.
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mov rax, cr4
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or rax, 0xa0
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mov cr4, rax
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mov \eax, cr4
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or \eax, 0xa0
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mov cr4, \eax
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// Set the page table. The application processors use
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// the same page table as the bootstrap processor's
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// boot phase page table.
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mov rax, 0
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mov rax, __boot_page_table_pointer
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mov cr3, rax
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push 0x8
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mov rax, offset ap_long_mode_in_low_address
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push rax
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retfq
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ap_long_mode_in_low_address:
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mov ax, 0
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mov ds, ax
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mov ss, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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// Update RIP to use the virtual address.
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mov rax, offset ap_long_mode
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jmp rax
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ap_long_mode:
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// The local APIC ID is in the RDI.
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mov rax, rdi
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shl rax, 3
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// Setup the stack.
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mov rbx, [__ap_boot_stack_array_pointer]
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mov rsp, [rbx + rax]
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xor rbp, rbp
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// Go to Rust code.
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mov rax, offset ap_early_entry
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call rax
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.extern halt # bsp_boot.S
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jmp halt
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mov eax, __boot_page_table_pointer // 32-bit load
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mov cr3, \eax
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.endm
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.code16
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ap_real_mode_boot:
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ap_boot_from_real_mode:
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cli // disable interrupts
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cld
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jmp ap_real_mode
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.code64
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ap_boot_from_long_mode:
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cli // disable interrupts
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cld
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// The firmware stores the local APIC ID in R8D, see:
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// <https://github.com/tianocore/edk2/blob/14b730cde8bfd56bba10cf78b24338b6a59b989f/OvmfPkg/TdxDxe/X64/ApRunLoop.nasm#L67-L73>.
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// FIXME: This is an implementation detail of the specific firmware. We
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// should NOT rely on it. We should NOT even try to rely on the local APIC
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// ID, because the APIC IDs on real hardware may NOT be contiguous (i.e.,
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// there may be holes where the holes do not represent logical processors).
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// We should compute the CPU ID ourselves using atomic operations.
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mov edi, r8d
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setup_64bit_gdt_and_page_table rax
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// Some firmware seems to provide per-AP stacks that we can use. However,
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// the ACPI specification does not promise that the stack is usable. It is
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// better not to rely on such implementation details.
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lea rsp, [rip + retf_stack_bottom]
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retf // 32-bit far return
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.align 8
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retf_stack_bottom:
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.long ap_long_mode
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.long 0x8
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retf_stack_top:
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.code16
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ap_real_mode:
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xor ax, ax // clear ax
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mov ds, ax // clear ds
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lgdt [ap_gdtr] // load gdt
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mov eax, cr0
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@ -150,9 +136,9 @@ x2apic_mode:
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// This is a pointer to the page table used by the APs.
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// The BSP will fill this pointer before kicking the APs.
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.global __boot_page_table_pointer
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.align 8
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.align 4
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__boot_page_table_pointer:
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.skip 8
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.skip 4
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ap_protect:
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// Save the local APIC ID in an unused register.
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@ -162,19 +148,7 @@ ap_protect:
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// Now we try getting into long mode.
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// Use the 64-bit GDT.
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lgdt [boot_gdtr]
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// Enable PAE and PGE.
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mov eax, cr4
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or eax, 0xa0
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mov cr4, eax
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// Set the page table. The application processors use
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// the same page table as the bootstrap processor's
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// boot phase page table.
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mov eax, __boot_page_table_pointer
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mov cr3, eax
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setup_64bit_gdt_and_page_table eax
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// Enable long mode.
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mov ecx, 0xc0000080
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@ -187,7 +161,32 @@ ap_protect:
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or eax, 1 << 31
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mov cr0, eax
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ljmp 0x8, offset ap_long_mode_in_low_address
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ljmp 0x8, offset ap_long_mode
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.code64
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ap_long_mode:
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mov ax, 0
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mov ds, ax
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mov ss, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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// The local APIC ID is in the RDI.
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mov rax, rdi
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shl rax, 3
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// Setup the stack.
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mov rbx, [__ap_boot_stack_array_pointer]
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mov rsp, [rbx + rax]
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xor rbp, rbp
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// Go to Rust code.
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mov rax, offset ap_early_entry
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call rax
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.extern halt # bsp_boot.S
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jmp halt
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.data
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// This is a pointer to be filled by the BSP when boot stacks
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@ -65,21 +65,9 @@ pub(crate) fn bringup_all_aps(num_cpus: u32) {
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copy_ap_boot_code();
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fill_boot_stack_array_ptr();
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fill_boot_pt_ptr();
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if_tdx_enabled!({
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use crate::arch::x86::kernel::acpi::AcpiMemoryHandler;
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use acpi::platform::wakeup_aps;
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let acpi_tables = get_acpi_tables().unwrap();
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for ap_num in 1..num_cpus {
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wakeup_aps(
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&acpi_tables,
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AcpiMemoryHandler {},
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ap_num,
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AP_BOOT_START_PA as u64,
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1000,
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)
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.unwrap();
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}
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if_tdx_enabled!({
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wake_up_aps_via_mailbox(num_cpus);
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} else {
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send_boot_ipis();
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});
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@ -155,6 +143,33 @@ extern "C" {
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fn __ap_boot_end();
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}
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#[cfg(feature = "cvm_guest")]
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fn wake_up_aps_via_mailbox(num_cpus: u32) {
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use acpi::platform::wakeup_aps;
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use crate::arch::x86::kernel::acpi::AcpiMemoryHandler;
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// The symbols are defined in `ap_boot.S`.
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extern "C" {
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fn ap_boot_from_real_mode();
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fn ap_boot_from_long_mode();
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}
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let offset = ap_boot_from_long_mode as usize - ap_boot_from_real_mode as usize;
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let acpi_tables = get_acpi_tables().unwrap();
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for ap_num in 1..num_cpus {
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wakeup_aps(
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&acpi_tables,
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AcpiMemoryHandler {},
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ap_num,
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(AP_BOOT_START_PA + offset) as u64,
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1000,
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)
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.unwrap();
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}
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}
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/// Sends IPIs to notify all application processors to boot.
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///
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/// Follow the INIT-SIPI-SIPI IPI sequence.
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@ -164,19 +179,15 @@ extern "C" {
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/// APs that have been started, this signal will not bring any cost.
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fn send_boot_ipis() {
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send_init_to_all_aps();
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spin_wait_cycles(100_000_000);
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send_init_deassert();
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spin_wait_cycles(20_000_000);
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send_startup_to_all_aps();
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spin_wait_cycles(20_000_000);
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send_startup_to_all_aps();
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spin_wait_cycles(20_000_000);
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}
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