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https://github.com/asterinas/asterinas.git
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Avoid Rust references of IRT entries
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parent
189daa2e09
commit
d4afe3a035
@ -2,23 +2,17 @@
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mod table;
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use alloc::sync::Arc;
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use core::{fmt::Debug, mem::size_of};
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use core::fmt::Debug;
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use log::{info, warn};
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use spin::Once;
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pub(super) use table::IntRemappingTable;
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use table::IrtEntry;
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use crate::{
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arch::iommu::registers::{ExtendedCapabilityFlags, IOMMU_REGS},
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prelude::Vaddr,
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sync::{LocalIrqDisabled, SpinLock},
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};
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use crate::arch::iommu::registers::{ExtendedCapabilityFlags, IOMMU_REGS};
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pub struct IrtEntryHandle {
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index: u16,
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entry_ref: Option<&'static mut IrtEntry>,
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table: &'static IntRemappingTable,
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}
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impl IrtEntryHandle {
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@ -26,32 +20,9 @@ impl IrtEntryHandle {
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self.index
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}
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#[expect(unused)]
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pub fn irt_entry(&self) -> Option<&IrtEntry> {
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self.entry_ref.as_deref()
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}
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pub fn irt_entry_mut(&mut self) -> Option<&mut IrtEntry> {
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self.entry_ref.as_deref_mut()
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}
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/// Set entry reference to None.
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pub(self) fn set_none(&mut self) {
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self.entry_ref = None;
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}
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/// Creates a handle based on index and the interrupt remapping table base virtual address.
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///
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/// # Safety
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///
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/// User must ensure the target address is **always** valid and point to `IrtEntry`.
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pub(self) unsafe fn new(table_vaddr: Vaddr, index: u16) -> Self {
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Self {
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index,
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entry_ref: Some(
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&mut *((table_vaddr + index as usize * size_of::<IrtEntry>()) as *mut IrtEntry),
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),
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}
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pub fn enable(&self, vector: u32) {
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self.table
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.set_entry(self.index, table::IrtEntry::new_enabled(vector));
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}
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}
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@ -59,8 +30,7 @@ impl Debug for IrtEntryHandle {
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fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
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f.debug_struct("IrtEntryHandle")
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.field("index", &self.index)
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.field("entry_ref", &self.entry_ref)
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.finish()
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.finish_non_exhaustive()
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}
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}
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@ -68,7 +38,7 @@ pub fn has_interrupt_remapping() -> bool {
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REMAPPING_TABLE.get().is_some()
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}
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pub fn alloc_irt_entry() -> Option<Arc<SpinLock<IrtEntryHandle, LocalIrqDisabled>>> {
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pub fn alloc_irt_entry() -> Option<IrtEntryHandle> {
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let page_table = REMAPPING_TABLE.get()?;
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page_table.alloc()
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}
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@ -1,6 +1,5 @@
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// SPDX-License-Identifier: MPL-2.0
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use alloc::{sync::Arc, vec::Vec};
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use core::{fmt::Debug, mem::size_of};
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use bitflags::bitflags;
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@ -9,7 +8,7 @@ use int_to_c_enum::TryFromInt;
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use super::IrtEntryHandle;
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use crate::{
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mm::{paddr_to_vaddr, FrameAllocOptions, Segment, PAGE_SIZE},
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mm::{FrameAllocOptions, Segment, UntypedMem, PAGE_SIZE},
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sync::{LocalIrqDisabled, SpinLock},
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};
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@ -20,80 +19,97 @@ enum ExtendedInterruptMode {
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X2Apic,
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}
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struct IntRemappingMeta;
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crate::impl_untyped_frame_meta_for!(IntRemappingMeta);
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pub struct IntRemappingTable {
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size: u16,
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num_entries: u16,
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extended_interrupt_mode: ExtendedInterruptMode,
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frames: Segment<()>,
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/// The global allocator for Interrupt remapping entry.
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segment: Segment<IntRemappingMeta>,
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/// A lock that prevents concurrent modification of entries.
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modification_lock: SpinLock<(), LocalIrqDisabled>,
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/// An allocator that allocates indexes to unused entries.
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allocator: SpinLock<IdAlloc, LocalIrqDisabled>,
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handles: Vec<Arc<SpinLock<IrtEntryHandle, LocalIrqDisabled>>>,
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}
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impl IntRemappingTable {
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pub fn alloc(&self) -> Option<Arc<SpinLock<IrtEntryHandle, LocalIrqDisabled>>> {
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let id = self.allocator.lock().alloc()?;
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Some(self.handles.get(id).unwrap().clone())
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pub fn alloc(&'static self) -> Option<IrtEntryHandle> {
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let index = self.allocator.lock().alloc()?;
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Some(IrtEntryHandle {
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index: index as u16,
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table: self,
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})
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}
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/// Creates an Interrupt Remapping Table with one `Segment` (default).
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/// Creates an Interrupt Remapping Table with one page.
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pub(super) fn new() -> Self {
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const DEFAULT_PAGES: usize = 1;
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let segment = FrameAllocOptions::new()
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.alloc_segment(DEFAULT_PAGES)
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.unwrap();
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let entry_number = (DEFAULT_PAGES * PAGE_SIZE / size_of::<u128>()) as u16;
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const NUM_PAGES: usize = 1;
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let mut handles = Vec::new();
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let base_vaddr = paddr_to_vaddr(segment.start_paddr());
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for index in 0..entry_number {
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// SAFETY: The IrtEntry reference will always valid and will disabled when IntRemappingTable is dropped.
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let handle = unsafe { IrtEntryHandle::new(base_vaddr, index) };
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handles.push(Arc::new(SpinLock::new(handle)));
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}
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let segment = FrameAllocOptions::new()
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.alloc_segment_with(NUM_PAGES, |_| IntRemappingMeta)
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.unwrap();
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let num_entries = (NUM_PAGES * PAGE_SIZE / size_of::<u128>())
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.try_into()
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.unwrap();
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Self {
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size: entry_number,
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num_entries,
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extended_interrupt_mode: ExtendedInterruptMode::X2Apic,
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frames: segment,
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allocator: SpinLock::new(IdAlloc::with_capacity(entry_number as usize)),
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handles,
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segment,
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modification_lock: SpinLock::new(()),
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allocator: SpinLock::new(IdAlloc::with_capacity(num_entries as usize)),
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}
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}
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/// Sets the entry in the Interrupt Remapping Table.
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pub(super) fn set_entry(&self, index: u16, entry: IrtEntry) {
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let _guard = self.modification_lock.lock();
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let [lower, upper] = entry.as_raw_u64();
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let offset = (index as usize) * size_of::<u128>();
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// Write a zero as the lower bits first to clear the present bit.
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self.segment
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.writer()
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.skip(offset)
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.write_once(&0u64)
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.unwrap();
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// Write the upper bits first (which keeps the present bit unset)
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self.segment
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.writer()
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.skip(offset + size_of::<u64>())
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.write_once(&upper)
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.unwrap();
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self.segment
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.writer()
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.skip(offset)
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.write_once(&lower)
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.unwrap();
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}
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/// Encodes the value written into the Interrupt Remapping Table Register.
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pub(crate) fn encode(&self) -> u64 {
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let mut encoded = self.frames.start_paddr() as u64;
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let mut encoded = self.segment.start_paddr() as u64;
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match self.extended_interrupt_mode {
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ExtendedInterruptMode::XApic => {}
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ExtendedInterruptMode::X2Apic => encoded |= 1 << 11,
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}
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// Bit Range 11 - Extended Interrupt Mode Enable (EIME)
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encoded |= match self.extended_interrupt_mode {
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ExtendedInterruptMode::XApic => 0,
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ExtendedInterruptMode::X2Apic => 1 << 11,
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};
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// entry_number = 2^(size+1)
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if self.size == 1 {
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panic!("Wrong entry number");
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}
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let mut size = 0;
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let mut tmp = self.size >> 1;
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while (tmp & 0b1) == 0 {
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tmp >>= 1;
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size += 1;
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}
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encoded += size;
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// Bit Range 3:0 - Size (S)
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encoded |= {
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assert!(self.num_entries.is_power_of_two());
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// num_entries = 2^(size+1)
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let size = self.num_entries.trailing_zeros().checked_sub(1).unwrap();
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assert!(size <= 15);
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size as u64
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};
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encoded
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}
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}
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impl Drop for IntRemappingTable {
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fn drop(&mut self) {
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for handle in self.handles.iter_mut() {
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let mut handle = handle.lock();
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handle.set_none();
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}
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}
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}
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/// The type of validation that must be performed by the interrupt-remapping hardware.
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#[derive(Debug, TryFromInt)]
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#[repr(u32)]
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@ -146,20 +162,15 @@ enum DeliveryMode {
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pub struct IrtEntry(u128);
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impl IrtEntry {
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#[expect(unused)]
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pub const fn new(value: u128) -> Self {
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Self(value)
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}
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#[expect(unused)]
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pub fn clear(&mut self) {
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self.0 = 0
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}
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/// Enables this entry with no validation,
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/// Creates an enabled entry with no validation,
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///
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/// DST = 0, IM = 0, DLM = 0, TM = 0, RH = 0, DM = 0, FPD = 1, P = 1
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pub fn enable_default(&mut self, vector: u32) {
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self.0 = 0b11 | ((vector as u128) << 16);
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pub(super) fn new_enabled(vector: u32) -> Self {
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Self(0b11 | ((vector as u128) << 16))
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}
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fn as_raw_u64(&self) -> [u64; 2] {
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[self.0 as u64, (self.0 >> 64) as u64]
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}
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pub fn source_validation_type(&self) -> SourceValidationType {
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@ -13,7 +13,7 @@ use x86_64::registers::rflags::{self, RFlags};
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use super::iommu::{alloc_irt_entry, has_interrupt_remapping, IrtEntryHandle};
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use crate::{
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cpu::PinCurrentCpu,
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sync::{LocalIrqDisabled, Mutex, PreemptDisabled, RwLock, RwLockReadGuard, SpinLock},
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sync::{Mutex, PreemptDisabled, RwLock, RwLockReadGuard, SpinLock},
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trap::TrapFrame,
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};
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@ -88,7 +88,7 @@ impl Debug for CallbackElement {
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pub(crate) struct IrqLine {
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pub(crate) irq_num: u8,
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pub(crate) callback_list: RwLock<Vec<CallbackElement>>,
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bind_remapping_entry: Once<Arc<SpinLock<IrtEntryHandle, LocalIrqDisabled>>>,
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bind_remapping_entry: Once<IrtEntryHandle>,
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}
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impl IrqLine {
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@ -105,11 +105,7 @@ impl IrqLine {
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let handle = alloc_irt_entry();
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if let Some(handle) = handle {
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// Enable the IRT entry
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handle
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.lock()
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.irt_entry_mut()
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.unwrap()
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.enable_default(irq_num as u32);
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handle.enable(irq_num as u32);
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irq.bind_remapping_entry.call_once(|| handle);
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}
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}
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@ -121,7 +117,7 @@ impl IrqLine {
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/// This method will return `None` if interrupt remapping is disabled or
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/// not supported by the architecture.
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pub fn remapping_index(&self) -> Option<u16> {
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Some(self.bind_remapping_entry.get()?.lock().index())
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Some(self.bind_remapping_entry.get()?.index())
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}
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/// Gets the IRQ number.
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