Move CPU context implementations to a specific module

kernel/src/arch/x86/cpu.rs

@@ -7,7 +7,7 @@ use alloc::{
 };
 
 use ostd::{
-    cpu::{cpuid, CpuException, CpuExceptionInfo, RawGeneralRegs, UserContext},
+    cpu::context::{cpuid, CpuException, CpuExceptionInfo, RawGeneralRegs, UserContext},
     Pod,
 };
 

kernel/src/arch/x86/signal.rs

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MPL-2.0
 
-use ostd::cpu::{CpuException, CpuExceptionInfo, UserContext};
+use ostd::cpu::context::{CpuException, CpuExceptionInfo, UserContext};
 
 use crate::process::signal::{
     constants::*, sig_num::SigNum, signals::fault::FaultSignal, SignalContext,

kernel/src/process/clone.rs

@@ -2,7 +2,7 @@
 
 use core::{num::NonZeroU64, sync::atomic::Ordering};
 
-use ostd::{cpu::UserContext, sync::RwArc, task::Task, user::UserContextApi};
+use ostd::{cpu::context::UserContext, sync::RwArc, task::Task, user::UserContextApi};
 
 use super::{
     posix_thread::{AsPosixThread, PosixThreadBuilder, ThreadName},

kernel/src/process/posix_thread/builder.rs

@@ -3,7 +3,7 @@
 #![expect(dead_code)]
 
 use ostd::{
-    cpu::{CpuSet, UserContext},
+    cpu::{context::UserContext, CpuSet},
     sync::RwArc,
     task::Task,
 };

kernel/src/process/posix_thread/posix_thread_ext.rs

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MPL-2.0
 
-use ostd::{cpu::UserContext, task::Task, user::UserContextApi};
+use ostd::{cpu::context::UserContext, task::Task, user::UserContextApi};
 
 use super::{builder::PosixThreadBuilder, name::ThreadName, PosixThread};
 use crate::{

kernel/src/process/signal/mod.rs

@@ -19,7 +19,7 @@ use align_ext::AlignExt;
 use c_types::{siginfo_t, ucontext_t};
 use constants::SIGSEGV;
 pub use events::{SigEvents, SigEventsFilter};
-use ostd::{cpu::UserContext, user::UserContextApi};
+use ostd::{cpu::context::UserContext, user::UserContextApi};
 pub use pause::{with_signal_blocked, Pause};
 pub use poll::{PollAdaptor, PollHandle, Pollable, Pollee, Poller};
 use sig_action::{SigAction, SigActionFlags, SigDefaultAction};

kernel/src/syscall/arch_prctl.rs

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MPL-2.0
 
-use ostd::cpu::UserContext;
+use ostd::cpu::context::UserContext;
 
 use super::SyscallReturn;
 use crate::prelude::*;

kernel/src/syscall/clone.rs

@@ -2,7 +2,7 @@
 
 use core::num::NonZeroU64;
 
-use ostd::cpu::UserContext;
+use ostd::cpu::context::UserContext;
 
 use super::SyscallReturn;
 use crate::{

kernel/src/syscall/execve.rs

@@ -2,7 +2,7 @@
 
 use aster_rights::WriteOp;
 use ostd::{
-    cpu::{FpuState, RawGeneralRegs, UserContext},
+    cpu::context::{FpuState, RawGeneralRegs, UserContext},
     user::UserContextApi,
 };
 

kernel/src/syscall/fork.rs

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MPL-2.0
 
-use ostd::cpu::UserContext;
+use ostd::cpu::context::UserContext;
 
 use super::SyscallReturn;
 use crate::{

kernel/src/syscall/mod.rs

@@ -3,7 +3,7 @@
 //! Read the Cpu ctx content then dispatch syscall to corresponding handler
 //! The each sub module contains functions that handle real syscall logic.
 pub use clock_gettime::ClockId;
-use ostd::cpu::UserContext;
+use ostd::cpu::context::UserContext;
 
 use crate::{context::Context, cpu::LinuxAbi, prelude::*};
 
@@ -281,7 +281,7 @@ macro_rules! impl_syscall_nums_and_dispatch_fn {
             syscall_number: u64,
             args: [u64; 6],
             ctx: &crate::context::Context,
-            user_ctx: &mut ostd::cpu::UserContext,
+            user_ctx: &mut ostd::cpu::context::UserContext,
         ) -> $crate::prelude::Result<$crate::syscall::SyscallReturn> {
             match syscall_number {
                 $(

kernel/src/syscall/rt_sigreturn.rs

@@ -2,7 +2,7 @@
 
 use core::sync::atomic::Ordering;
 
-use ostd::{cpu::UserContext, user::UserContextApi};
+use ostd::{cpu::context::UserContext, user::UserContextApi};
 
 use super::SyscallReturn;
 use crate::{prelude::*, process::signal::c_types::ucontext_t};

kernel/src/thread/exception.rs

@@ -3,7 +3,7 @@
 #![expect(unused_variables)]
 
 use aster_rights::Full;
-use ostd::cpu::*;
+use ostd::cpu::context::{CpuExceptionInfo, UserContext};
 
 use crate::{
     current_userspace,

kernel/src/thread/task.rs

@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: MPL-2.0
 
 use ostd::{
-    cpu::UserContext,
+    cpu::context::UserContext,
     task::{Task, TaskOptions},
     user::{ReturnReason, UserContextApi, UserMode},
 };

osdk/tests/examples_in_book/write_a_kernel_in_100_lines_templates/lib.rs

@@ -12,7 +12,7 @@ use alloc::sync::Arc;
 use alloc::vec;
 
 use ostd::arch::qemu::{exit_qemu, QemuExitCode};
-use ostd::cpu::UserContext;
+use ostd::cpu::context::UserContext;
 use ostd::mm::{
     CachePolicy, FallibleVmRead, FrameAllocOptions, PageFlags, PageProperty, Vaddr, VmIo, VmSpace,
     VmWriter, PAGE_SIZE,

ostd/src/arch/riscv/cpu/context.rs

@@ -1,16 +1,16 @@
 // SPDX-License-Identifier: MPL-2.0
 
-//! CPU
+//! CPU execution context control.
-
-pub mod local;
 
 use core::fmt::Debug;
 
 use riscv::register::scause::{Exception, Trap};
 
-pub use super::trap::GeneralRegs as RawGeneralRegs;
+pub use crate::arch::riscv::trap::GeneralRegs as RawGeneralRegs;
-use super::trap::{TrapFrame, UserContext as RawUserContext};
+use crate::{
-use crate::user::{ReturnReason, UserContextApi, UserContextApiInternal};
+    arch::riscv::trap::{TrapFrame, UserContext as RawUserContext},
+    user::{ReturnReason, UserContextApi, UserContextApiInternal},
+};
 
 /// Cpu context, including both general-purpose registers and FPU state.
 #[derive(Clone, Copy, Debug)]

ostd/src/arch/riscv/cpu/mod.rs

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: MPL-2.0
+
+//! CPU context & state control and CPU local memory.
+
+pub mod context;
+pub mod local;

ostd/src/arch/x86/cpu/context/mod.rs

@@ -1,8 +1,6 @@
 // SPDX-License-Identifier: MPL-2.0
 
-//! CPU.
+//! CPU execution context control.
-
-pub mod local;
 
 use alloc::boxed::Box;
 use core::{
@@ -18,19 +16,14 @@ use num_derive::FromPrimitive;
 use num_traits::FromPrimitive;
 use spin::Once;
 use x86::bits64::segmentation::wrfsbase;
-pub use x86::cpuid;
 use x86_64::registers::{
     control::{Cr0, Cr0Flags},
     rflags::RFlags,
     xcontrol::XCr0,
 };
 
-pub use super::trap::GeneralRegs as RawGeneralRegs;
-use super::{
-    trap::{TrapFrame, UserContext as RawUserContext},
-    CPU_FEATURES,
-};
 use crate::{
+    arch::x86::CPU_FEATURES,
     task::scheduler,
     trap::call_irq_callback_functions,
     user::{ReturnReason, UserContextApi, UserContextApiInternal},
@@ -44,6 +37,12 @@ cfg_if! {
     }
 }
 
+pub use x86::cpuid;
+
+pub use crate::arch::trap::{
+    GeneralRegs as RawGeneralRegs, TrapFrame, UserContext as RawUserContext,
+};
+
 /// Cpu context, including both general-purpose registers and FPU state.
 #[derive(Clone, Default, Debug)]
 #[repr(C)]
@@ -588,7 +587,7 @@ static XSAVE_AREA_SIZE: Once<usize> = Once::new();
 /// The max size in bytes of the XSAVE area.
 const MAX_XSAVE_AREA_SIZE: usize = 4096;
 
-pub(super) fn enable_essential_features() {
+pub(in crate::arch::x86) fn enable_essential_features() {
     XSTATE_MAX_FEATURES.call_once(|| {
         const XSTATE_CPUID: u32 = 0x0000000d;
 

ostd/src/arch/x86/cpu/context/tdx.rs

@@ -4,7 +4,7 @@ use tdx_guest::{
     handle_virtual_exception as do_handle_virtual_exception, tdcall, TdgVeInfo, TdxTrapFrame,
 };
 
-use crate::cpu::{RawGeneralRegs, UserContext};
+use crate::cpu::context::{RawGeneralRegs, UserContext};
 
 pub(crate) struct VirtualizationExceptionHandler {
     ve_info: TdgVeInfo,

ostd/src/arch/x86/cpu/mod.rs

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: MPL-2.0
+
+//! CPU context & state control and CPU local memory.
+
+pub mod context;
+pub mod local;

ostd/src/arch/x86/mod.rs

@@ -119,7 +119,7 @@ pub(crate) unsafe fn init_on_ap() {
 }
 
 pub(crate) fn interrupts_ack(irq_number: usize) {
-    if !cpu::CpuException::is_cpu_exception(irq_number as u16) {
+    if !cpu::context::CpuException::is_cpu_exception(irq_number as u16) {
         kernel::apic::with_borrow(|apic| {
             apic.eoi();
         });
@@ -178,7 +178,7 @@ pub(crate) fn enable_cpu_features() {
         cpuid.get_feature_info().unwrap()
     });
 
-    cpu::enable_essential_features();
+    cpu::context::enable_essential_features();
 
     let mut cr4 = x86_64::registers::control::Cr4::read();
     cr4 |= Cr4Flags::FSGSBASE

ostd/src/arch/x86/trap/mod.rs

@@ -28,7 +28,7 @@ use spin::Once;
 use super::ex_table::ExTable;
 use crate::{
     arch::irq::{disable_local, enable_local},
-    cpu::{CpuException, CpuExceptionInfo, PageFaultErrorCode},
+    cpu::context::{CpuException, CpuExceptionInfo, PageFaultErrorCode},
     cpu_local_cell, if_tdx_enabled,
     mm::{
         kspace::{KERNEL_PAGE_TABLE, LINEAR_MAPPING_BASE_VADDR, LINEAR_MAPPING_VADDR_RANGE},

ostd/src/task/mod.rs

@@ -27,7 +27,7 @@ pub use self::{
     scheduler::info::{AtomicCpuId, TaskScheduleInfo},
 };
 pub(crate) use crate::arch::task::{context_switch, TaskContext};
-use crate::{cpu::UserContext, prelude::*, trap::in_interrupt_context};
+use crate::{cpu::context::UserContext, prelude::*, trap::in_interrupt_context};
 
 static POST_SCHEDULE_HANDLER: Once<fn()> = Once::new();
 

ostd/src/user.rs

@@ -2,7 +2,7 @@
 
 //! User mode.
 
-use crate::{cpu::UserContext, trap::TrapFrame};
+use crate::{cpu::context::UserContext, trap::TrapFrame};
 
 /// Specific architectures need to implement this trait. This should only used in [`UserMode`]
 ///