License rust and c source files

This commit is contained in:
Jianfeng Jiang 2024-01-03 03:22:36 +00:00 committed by Tate, Hongliang Tian
parent 5fb8a9f7e5
commit faaa4438d6
559 changed files with 1192 additions and 89 deletions

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// SPDX-License-Identifier: MPL-2.0
use std::{error::Error, path::PathBuf};
fn main() -> Result<(), Box<dyn Error + Send + Sync>> {

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// SPDX-License-Identifier: MPL-2.0
#[cfg(target_arch = "x86_64")]
pub mod x86;

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// SPDX-License-Identifier: MPL-2.0
//! The Linux 64-bit Boot Protocol supporting module.
//!

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// SPDX-License-Identifier: MPL-2.0
//! The x86 boot module defines the entrypoints of Asterinas and
//! the corresponding headers for different x86 boot protocols.
//!

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/* SPDX-License-Identifier: MPL-2.0 */
// This is the GNU Multiboot header.
// Reference: https://www.gnu.org/software/grub/manual/multiboot/multiboot.html
.section ".multiboot_header", "a"

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// SPDX-License-Identifier: MPL-2.0
use alloc::{string::String, vec::Vec};
use multiboot2::MemoryAreaType;
use spin::Once;

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/* SPDX-License-Identifier: MPL-2.0 */
// This is the GNU Multiboot 2 header.
// Reference: https://www.gnu.org/software/grub/manual/multiboot2/html_node/Index.html//Index
.section ".multiboot2_header", "a"

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// SPDX-License-Identifier: MPL-2.0
use alloc::{
string::{String, ToString},
vec::Vec,

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// SPDX-License-Identifier: MPL-2.0
use core::fmt::Write;
use crate::sync::SpinLock;

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// SPDX-License-Identifier: MPL-2.0
//! CPU.
use core::arch::x86_64::{_fxrstor, _fxsave};

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// SPDX-License-Identifier: MPL-2.0
use acpi::{fadt::Fadt, sdt::Signature};
use x86_64::instructions::port::{ReadOnlyAccess, WriteOnlyAccess};

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// SPDX-License-Identifier: MPL-2.0
use core::marker::PhantomData;
pub use x86_64::instructions::port::{

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// SPDX-License-Identifier: MPL-2.0
//! Device-related APIs.
//! This module mainly contains the APIs that should exposed to the device driver like PCI, RTC

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// SPDX-License-Identifier: MPL-2.0
//! A port-mapped UART. Copied from uart_16550.
use crate::arch::x86::device::io_port::{IoPort, ReadWriteAccess, WriteOnlyAccess};

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// SPDX-License-Identifier: MPL-2.0
use core::mem::size_of;
use alloc::collections::BTreeMap;

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// SPDX-License-Identifier: MPL-2.0
use core::fmt::Debug;
use alloc::vec::Vec;

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// SPDX-License-Identifier: MPL-2.0
mod context_table;
mod fault;
mod remapping;

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// SPDX-License-Identifier: MPL-2.0
use bitflags::bitflags;
use log::debug;
use spin::Once;

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// SPDX-License-Identifier: MPL-2.0
use pod::Pod;
use crate::{

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// SPDX-License-Identifier: MPL-2.0
use crate::sync::Mutex;
use alloc::{boxed::Box, fmt::Debug, sync::Arc, vec::Vec};
use spin::Once;

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// SPDX-License-Identifier: MPL-2.0
use core::{fmt::Debug, mem::size_of, slice::Iter};
use acpi::{sdt::Signature, AcpiTable};

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// SPDX-License-Identifier: MPL-2.0
pub mod dmar;
pub mod remapping;

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// SPDX-License-Identifier: MPL-2.0
//! Remapping structures of DMAR table.
//! This file defines these structures and provides a "Debug" implementation to see the value inside these structures.
//! Most of the introduction are copied from Intel vt-directed-io-specification.

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// SPDX-License-Identifier: MPL-2.0
use acpi::PlatformInfo;
use alloc::vec;
use alloc::vec::Vec;

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// SPDX-License-Identifier: MPL-2.0
use crate::sync::Mutex;
use alloc::boxed::Box;
use alloc::sync::Arc;

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// SPDX-License-Identifier: MPL-2.0
use x86::msr::{
rdmsr, wrmsr, IA32_APIC_BASE, IA32_X2APIC_APICID, IA32_X2APIC_CUR_COUNT, IA32_X2APIC_DIV_CONF,
IA32_X2APIC_EOI, IA32_X2APIC_INIT_COUNT, IA32_X2APIC_LVT_TIMER, IA32_X2APIC_SIVR,

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// SPDX-License-Identifier: MPL-2.0
use crate::sync::Mutex;
use crate::vm;
use spin::Once;

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// SPDX-License-Identifier: MPL-2.0
pub(super) mod acpi;
pub(super) mod apic;
pub(super) mod pic;

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// SPDX-License-Identifier: MPL-2.0
use crate::arch::x86::device::io_port::{IoPort, WriteOnlyAccess};
use crate::trap::IrqLine;
use core::sync::atomic::Ordering::Relaxed;

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// SPDX-License-Identifier: MPL-2.0
use core::sync::atomic::AtomicU64;
use x86::cpuid::cpuid;

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// SPDX-License-Identifier: MPL-2.0
use crate::sync::Mutex;
use alloc::{collections::BTreeMap, fmt};
use pod::Pod;

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// SPDX-License-Identifier: MPL-2.0
pub mod boot;
pub mod console;
pub(crate) mod cpu;

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// SPDX-License-Identifier: MPL-2.0
//! PCI bus io port
use super::device::io_port::{IoPort, ReadWriteAccess, WriteOnlyAccess};

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// SPDX-License-Identifier: MPL-2.0
//! Providing the ability to exit QEMU and return a value as debug result.
/// The exit code of x86 QEMU isa debug device. In `qemu-system-x86_64` the

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// SPDX-License-Identifier: MPL-2.0
use tdx_guest::{
tdcall::TdgVeInfo,
tdvmcall::{cpuid, hlt, rdmsr, wrmsr, IoSize},

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// SPDX-License-Identifier: MPL-2.0
use alloc::sync::Arc;
use core::arch::x86_64::_rdtsc;
use core::sync::atomic::{AtomicBool, AtomicU64, Ordering};

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// SPDX-License-Identifier: MPL-2.0
use crate::{trap::IrqLine, vm::paddr_to_vaddr};
use acpi::{AcpiError, HpetInfo};
use alloc::vec::Vec;

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// SPDX-License-Identifier: MPL-2.0
pub mod apic;
pub mod hpet;
pub mod pit;

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// SPDX-License-Identifier: MPL-2.0
//! used for PIT Timer
use crate::config::TIMER_FREQ;

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// SPDX-License-Identifier: MPL-2.0
//! The module to parse kernel command-line arguments.
//!
//! The format of the Asterinas command line string conforms

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// SPDX-License-Identifier: MPL-2.0
//! Information of memory regions in the boot phase.
//!

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// SPDX-License-Identifier: MPL-2.0
//! The architecture-independent boot module, which provides a universal interface
//! from the bootloader to the rest of the framework.
//!

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// SPDX-License-Identifier: MPL-2.0
use alloc::{collections::VecDeque, fmt::Debug, sync::Arc, vec::Vec};
use log::{debug, error};

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// SPDX-License-Identifier: MPL-2.0
use int_to_c_enum::TryFromInt;
use log::info;

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// SPDX-License-Identifier: MPL-2.0
//! Virtio over MMIO
pub mod bus;

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// SPDX-License-Identifier: MPL-2.0
pub mod mmio;
pub mod pci;

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// SPDX-License-Identifier: MPL-2.0
use core::fmt::Debug;
use alloc::{collections::VecDeque, sync::Arc, vec::Vec};

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// SPDX-License-Identifier: MPL-2.0
use alloc::vec::Vec;
use self::{msix::CapabilityMsixData, vendor::CapabilityVndrData};

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// SPDX-License-Identifier: MPL-2.0
use alloc::{sync::Arc, vec::Vec};
use crate::{

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// SPDX-License-Identifier: MPL-2.0
use crate::bus::pci::{common_device::PciCommonDevice, device_info::PciDeviceLocation};
use crate::{Error, Result};

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// SPDX-License-Identifier: MPL-2.0
use alloc::sync::Arc;
use bitflags::bitflags;

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// SPDX-License-Identifier: MPL-2.0
use alloc::vec::Vec;
use super::{

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// SPDX-License-Identifier: MPL-2.0
use core::iter;
use crate::arch::pci::{PCI_ADDRESS_PORT, PCI_DATA_PORT};

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// SPDX-License-Identifier: MPL-2.0
//! PCI bus
//!
//! Users can implement the bus under the `PciDriver` to the PCI bus to register devices,

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// SPDX-License-Identifier: MPL-2.0
#![allow(unused)]
use log::Level;

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// SPDX-License-Identifier: MPL-2.0
use core::fmt::Arguments;
pub fn print(args: Arguments) {

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// SPDX-License-Identifier: MPL-2.0
//! CPU.
use crate::trap::disable_local;

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// SPDX-License-Identifier: MPL-2.0
/// The error type which is returned from the APIs of this crate.
#[derive(Clone, Copy, PartialEq, Eq, Debug)]
pub enum Error {

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// SPDX-License-Identifier: MPL-2.0
use core::{mem::size_of, ops::Range};
use pod::Pod;

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// SPDX-License-Identifier: MPL-2.0
//! The framework part of Asterinas.
#![feature(alloc_error_handler)]
#![feature(const_mut_refs)]

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// SPDX-License-Identifier: MPL-2.0
use crate::{config::DEFAULT_LOG_LEVEL, early_println};
use log::{Metadata, Record};

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// SPDX-License-Identifier: MPL-2.0
//! Panic support.
use alloc::{boxed::Box, string::ToString};

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// SPDX-License-Identifier: MPL-2.0
//! The prelude.
pub type Result<T> = core::result::Result<T, crate::error::Error>;

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// SPDX-License-Identifier: MPL-2.0
use core::fmt::{self};
use core::sync::atomic::{AtomicU64, Ordering::Relaxed};

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// SPDX-License-Identifier: MPL-2.0
mod atomic_bits;
mod mutex;
// TODO: refactor this rcu implementation

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// SPDX-License-Identifier: MPL-2.0
use super::WaitQueue;
use core::cell::UnsafeCell;
use core::ops::{Deref, DerefMut};

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// SPDX-License-Identifier: MPL-2.0
//! Read-copy update (RCU).
use core::marker::PhantomData;

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// SPDX-License-Identifier: MPL-2.0
use alloc::collections::VecDeque;
use core::sync::atomic::{
AtomicBool,

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// SPDX-License-Identifier: MPL-2.0
use core::ptr::NonNull;
use crate::prelude::*;

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// SPDX-License-Identifier: MPL-2.0
use core::cell::UnsafeCell;
use core::fmt;
use core::ops::{Deref, DerefMut};

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// SPDX-License-Identifier: MPL-2.0
use core::cell::UnsafeCell;
use core::fmt;
use core::ops::{Deref, DerefMut};

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// SPDX-License-Identifier: MPL-2.0
use core::cell::UnsafeCell;
use core::fmt;
use core::ops::{Deref, DerefMut};

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// SPDX-License-Identifier: MPL-2.0
use super::SpinLock;
use crate::arch::timer::add_timeout_list;
use crate::config::TIMER_FREQ;

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// SPDX-License-Identifier: MPL-2.0
//! Tasks are the unit of code execution.
mod priority;

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// SPDX-License-Identifier: MPL-2.0
use crate::config::REAL_TIME_TASK_PRI;
/// The priority of a task.

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// SPDX-License-Identifier: MPL-2.0
use core::sync::atomic::AtomicUsize;
use crate::cpu_local;

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// SPDX-License-Identifier: MPL-2.0
use crate::prelude::*;
use crate::sync::SpinLock;
use crate::task::Task;

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// SPDX-License-Identifier: MPL-2.0
use crate::arch::mm::PageTableFlags;
use crate::config::{KERNEL_STACK_SIZE, PAGE_SIZE};
use crate::cpu::CpuSet;

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// SPDX-License-Identifier: MPL-2.0
//! Timer.
#[cfg(target_arch = "x86_64")]

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// SPDX-License-Identifier: MPL-2.0
use crate::{arch::irq::IRQ_LIST, cpu::CpuException};
#[cfg(feature = "intel_tdx")]

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// SPDX-License-Identifier: MPL-2.0
use crate::arch::irq::{self, IrqCallbackHandle, NOT_USING_IRQ};
use crate::task::{disable_preempt, DisablePreemptGuard};
use crate::{prelude::*, Error};

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// SPDX-License-Identifier: MPL-2.0
mod handler;
mod irq;

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// SPDX-License-Identifier: MPL-2.0
//! User space.
use crate::cpu::UserContext;

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// SPDX-License-Identifier: MPL-2.0
pub mod recycle_allocator;

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// SPDX-License-Identifier: MPL-2.0
use alloc::vec::Vec;
#[derive(Debug)]

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// SPDX-License-Identifier: MPL-2.0
use alloc::sync::Arc;
use core::ops::Deref;

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// SPDX-License-Identifier: MPL-2.0
use alloc::sync::Arc;
use core::arch::x86_64::_mm_clflush;
use core::ops::Range;

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// SPDX-License-Identifier: MPL-2.0
mod dma_coherent;
mod dma_stream;

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// SPDX-License-Identifier: MPL-2.0
use alloc::vec;
use core::{
iter::Iterator,

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// SPDX-License-Identifier: MPL-2.0
use align_ext::AlignExt;
use alloc::vec::Vec;
use buddy_system_allocator::FrameAllocator;

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// SPDX-License-Identifier: MPL-2.0
use crate::config::{KERNEL_HEAP_SIZE, PAGE_SIZE};
use crate::prelude::*;
use crate::sync::SpinLock;

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// SPDX-License-Identifier: MPL-2.0
use crate::prelude::*;
use pod::Pod;

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// SPDX-License-Identifier: MPL-2.0
use super::page_table::{PageTable, PageTableConfig, UserMode};
use crate::{
arch::mm::{PageTableEntry, PageTableFlags},

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// SPDX-License-Identifier: MPL-2.0
//! Virtual memory (VM).
/// Virtual addresses.

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// SPDX-License-Identifier: MPL-2.0
/// Get the offset of a field within a type as a pointer.
///
/// ```rust

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// SPDX-License-Identifier: MPL-2.0
use crate::{prelude::*, Error};
use super::{frame::VmFrameFlags, frame_allocator, VmFrame, VmFrameVec, VmSegment};

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// SPDX-License-Identifier: MPL-2.0
use super::{paddr_to_vaddr, Paddr, Vaddr, VmAllocOptions};
use crate::{
arch::mm::{is_kernel_vaddr, is_user_vaddr, tlb_flush, PageTableEntry},

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// SPDX-License-Identifier: MPL-2.0
use crate::arch::mm::PageTableFlags;
use crate::config::PAGE_SIZE;
use crate::sync::Mutex;

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// SPDX-License-Identifier: MPL-2.0
#![cfg_attr(not(test), no_std)]
/// An extension trait for Rust integer types, including `u8`, `u16`, `u32`,

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// SPDX-License-Identifier: MPL-2.0
#![feature(proc_macro_span)]
extern crate proc_macro2;

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