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Samuka007/asterinas
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mirror of https://github.com/asterinas/asterinas.git synced 2025-06-18 03:56:42 +00:00
Code Issues Packages Projects Releases Wiki Activity
1,757 Commits 1 Branch 29 Tags
0cb2ea562e24f8bfcd894cfe9f7ad3ee5f27c1bd
Commit Graph

14 Commits

Author SHA1 Message Date
Chen Chengjun
0cb2ea562e Inject the logger for Asterinas 2024-12-04 13:24:06 +08:00
jiangjianfeng
495c93c2ad Refactor Rwlock to take type parameter 2024-11-21 15:46:10 +08:00
Zhang Junyang
9e4257b655 Fix multiple issues pointed out by the new compiler 2024-10-13 22:32:05 +08:00
YanWQ-monad
4fa0e6334b Add RISC-V base support 2024-09-30 10:02:08 +08:00
YanWQ-monad
839c2a6689 Extract shared code from timer 2024-09-30 10:02:08 +08:00
Zhang Junyang
53ce7df53c Warn instead of panic on long clock update interval 2024-09-12 17:53:14 +08:00
Chen Chengjun
364ef48e2f Fix a concurrency bug in clocksource 2024-08-17 17:57:26 +08:00
YanWQ-monad
97fab9edea Prepare aster-time for platform-dependent implementations 2024-08-09 08:53:24 +08:00
Yuke Peng
0970adb37b Add documentation to x86/device 2024-07-09 19:42:15 +08:00
Jianfeng Jiang
59350a8578 Rename aster-frame to ostd 2024-06-27 15:45:49 +08:00
Chen Chengjun
c02eacd50c Use deny(unsafe_code) instead of forbid(unsafe_code) 2024-05-31 16:05:58 +08:00
Chen Chengjun
b226928349 Remove the timer module from the aster-frame and adjust the related code 2024-05-20 16:09:27 +08:00
Chen Chengjun
c3d0c59041 Fix the logics for the coarse resolution clock id in VDSO. 2024-05-09 17:34:10 +08:00
Zhang Junyang
e3c227ae06 Refactor project structure 2024-02-28 16:30:48 +08:00
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