41 Commits

Author	SHA1	Message	Date
Ruihan Li	758c80c321	Pull code from arch/*/irq.rs to trap/irq.rs	2025-05-25 10:19:17 +08:00
Ruihan Li	e81053b9dc	Remove unnecessary _rdtsc uses	2025-05-21 21:00:02 +08:00
Ruihan Li	a18e72b495	Implement apic::get_or_init using Once	2025-05-21 21:00:02 +08:00
Ruihan Li	8c30b4b942	Rewrite trap/gdt.rs	2025-04-22 20:52:15 +08:00
Ruihan Li	e06509e380	Make some unsafe blocks shorter	2025-04-22 20:52:15 +08:00
Zejun Zhao	e4aa261c48	Make if_tdx_enabled macro x86-specific	2025-04-18 13:26:16 +08:00
Zejun Zhao	dd67a9a175	Clean up code	2025-04-18 13:26:16 +08:00
Yuke Peng	74ffe72cad	Refactor the initialization of IoPortAllocator	2025-04-16 10:09:19 +08:00
Yuke Peng	a038b8401b	Rename allocator.rs to io.rs	2025-04-16 10:09:19 +08:00
Yuke Peng	d359cc44d6	Implement IoPortAllocator	2025-04-16 10:09:19 +08:00
Zhe Tang	36f6f9bcd4	Fix the AVX initialization bugs on lower-end CPUs	2025-04-10 09:52:38 +08:00
Ruihan Li	b52d841ac1	Revise safety comments for booting APs	2025-04-03 10:50:22 +08:00
Yuke Peng	05ec50def3	Remove the system device's IO memory access	2025-03-22 17:38:30 +08:00
Yuke Peng	8a26b785a4	Implement IoMemAllocator	2025-03-22 17:38:30 +08:00
Ruihan Li	d56b7fa6ff	Don't force every printer to use if_tdx_enabled	2025-03-22 10:16:43 +08:00
Zhang Junyang	265bc25dd7	Enable timer IRQs on x86 APs with APIC timer interrupt	2025-03-21 21:19:50 +08:00
Zhang Junyang	f1c7564184	Move CPU context implementations to a specific module	2025-03-21 21:19:50 +08:00
Hsy-Intel	b6cf27507c	Use TDVMCALL serial output in the early stages of kernel initialization	2025-03-20 17:25:22 +08:00
Hsy-Intel	49e6cd2712	Use macro to handle TDX-related code	2025-03-20 17:25:22 +08:00
Zhang Junyang	92bc8cbbf7	Make CPU-local and early ACPI initialization heap-less	2025-03-14 08:37:37 +08:00
LeslieKid	43985c737a	Enable RCU ... Co-authored-by: Zhang Junyang <junyang@stu.pku.edu.cn>	2025-03-03 09:24:49 +08:00
jiangjianfeng	3dbdef4d6c	Add several lmbench network benchmark	2024-12-26 09:08:21 +08:00
Qingsong Chen	5e35704e38	Support eagerly FPU state save/restore ... Co-authored-by: Shaowei Song <songshaowei.ssw@antgroup.com>	2024-11-29 21:53:14 +08:00
Hsy-Intel	d67976da88	Support TDX debugging feature	2024-11-26 19:15:22 +08:00
YanWQ-monad	4fa0e6334b	Add RISC-V base support	2024-09-30 10:02:08 +08:00
Qingsong Chen	c2f7a10b84	Implement cpu_local with GS and ensure GS points to TSS	2024-09-19 13:00:36 +08:00
Zhang Junyang	326ec09169	Initialize local APICs on every processors	2024-09-13 20:10:03 +08:00
Zhang Junyang	f7a9510be0	Refactor the this_cpu API with PinCurrentCpu	2024-08-25 20:14:06 +08:00
Hsy-Intel	8317c4c1e8	Rename "intel_tdx" feature to "cvm_guest"	2024-08-09 17:11:12 +08:00
Hsy-Intel	ca41687a99	Use cfg_if to group tdx cfg block	2024-08-09 17:11:12 +08:00
Zhang Junyang	fe68b4b510	Generalize single instruction CPU local operations by cpu_local_cell	2024-08-08 19:21:03 +08:00
Zhang Junyang	393c9019c0	Boot application processors into spin loops ... Co-authored-by: Chuandong Li <lichuand@pku.edu.cn>	2024-07-30 10:24:09 +08:00
Zhang Junyang	8acfc8eb6a	Move CpuSet out of ostd::arch and implement this_cpu ... Co-authored-by: Chuandong Li <lichuand@pku.edu.cn>	2024-07-30 10:24:09 +08:00
YanWQ-monad	5aa28eae7e	Extract x86-specific code from call_irq_callback_functions	2024-07-22 22:04:50 +08:00
Zhang Junyang	8a9c012249	Check CPUID before enabling AVX512	2024-07-17 10:24:45 +08:00
Shaowei Song	6cfccccab1	Enable AVX-512 flags in XCR0	2024-07-16 21:26:20 +08:00
Hsy-Intel	4292ec2ebb	Make intel_tdx feature as default	2024-07-16 21:22:29 +08:00
Zhang Junyang	9e5f3123e1	Log messages to the serial atomically and rename arch::serial ... Co-authored-by: Chuandong Li <lichuand@pku.edu.cn>	2024-07-09 21:56:03 +08:00
Qingsong Chen	98619f3482	Init RNG with rdrand directly (without getrandom)	2024-07-03 14:56:33 +08:00
Chen Chengjun	5f7cf245ac	Enable exception table mechanism	2024-06-28 15:36:21 +08:00
Jianfeng Jiang	59350a8578	Rename aster-frame to ostd	2024-06-27 15:45:49 +08:00