add command table data structure

kernel/driver/disk/ahci/ahci.h

@@ -251,6 +251,61 @@ typedef volatile struct tagHBA_FIS
 	uint8_t   	rsv[0x100-0xA0];
 } HBA_FIS;
 
+typedef struct tagHBA_CMD_HEADER
+{
+	// DW0
+	uint8_t  cfl:5;		// Command FIS length in DWORDS, 2 ~ 16
+	uint8_t  a:1;		// ATAPI
+	uint8_t  w:1;		// Write, 1: H2D, 0: D2H
+	uint8_t  p:1;		// Prefetchable
+ 
+	uint8_t  r:1;		// Reset
+	uint8_t  b:1;		// BIST
+	uint8_t  c:1;		// Clear busy upon R_OK
+	uint8_t  rsv0:1;		// Reserved
+	uint8_t  pmp:4;		// Port multiplier port
+ 
+	uint16_t prdtl;		// Physical region descriptor table length in entries
+ 
+	// DW1
+	volatile
+	uint32_t prdbc;		// Physical region descriptor byte count transferred
+ 
+	// DW2, 3
+	uint32_t ctba;		// Command table descriptor base address
+	uint32_t ctbau;		// Command table descriptor base address upper 32 bits
+ 
+	// DW4 - 7
+	uint32_t rsv1[4];	// Reserved
+} HBA_CMD_HEADER;
+
+typedef struct tagHBA_CMD_TBL
+{
+	// 0x00
+	uint8_t  cfis[64];	// Command FIS
+ 
+	// 0x40
+	uint8_t  acmd[16];	// ATAPI command, 12 or 16 bytes
+ 
+	// 0x50
+	uint8_t  rsv[48];	// Reserved
+ 
+	// 0x80
+	HBA_PRDT_ENTRY	prdt_entry[1];	// Physical region descriptor table entries, 0 ~ 65535
+} HBA_CMD_TBL;
+ 
+typedef struct tagHBA_PRDT_ENTRY
+{
+	uint32_t dba;		// Data base address
+	uint32_t dbau;		// Data base address upper 32 bits
+	uint32_t rsv0;		// Reserved
+ 
+	// DW3
+	uint32_t dbc:22;		// Byte count, 4M max
+	uint32_t rsv1:9;		// Reserved
+	uint32_t i:1;		// Interrupt on completion
+} HBA_PRDT_ENTRY;
+
 struct block_device_request_queue ahci_req_queue;
 
 struct block_device_operation ahci_operation =