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🆕 读取pci设备header
This commit is contained in:
fslongjin
parent
5c3a472310
commit
5e9bd1d44e
@ -23,7 +23,216 @@ uint pci_read_config(uchar bus, uchar slot, uchar func, uchar offset)
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return (uint)(io_in32(PORT_PCI_CONFIG_DATA));
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}
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/**
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* @brief 读取type为0x0的pci设备的header
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* 本函数只应被 pci_read_header()调用
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* @param header 返回的header
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* @param bus 总线号
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* @param slot 插槽号
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* @param func 功能号
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*/
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static void pci_read_general_device_header(struct pci_device_structure_general_device_t *header, uchar bus, uchar slot, uchar func)
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{
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uint32_t tmp32;
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header->BAR0 = pci_read_config(bus, slot, func, 0x10);
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header->BAR1 = pci_read_config(bus, slot, func, 0x14);
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header->BAR2 = pci_read_config(bus, slot, func, 0x18);
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header->BAR3 = pci_read_config(bus, slot, func, 0x1c);
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header->BAR4 = pci_read_config(bus, slot, func, 0x20);
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header->BAR5 = pci_read_config(bus, slot, func, 0x24);
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header->Cardbus_CIS_Pointer = pci_read_config(bus, slot, func, 0x28);
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tmp32 = pci_read_config(bus, slot, func, 0x2c);
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header->Subsystem_Vendor_ID = tmp32 & 0xffff;
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header->Subsystem_ID = (tmp32 >> 16) & 0xffff;
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header->Expansion_ROM_base_address = pci_read_config(bus, slot, func, 0x30);
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tmp32 = pci_read_config(bus, slot, func, 0x34);
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header->Capabilities_Pointer = tmp32 & 0xff;
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header->reserved0 = (tmp32 >> 8) & 0xff;
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header->reserved1 = (tmp32 >> 16) & 0xffff;
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header->reserved2 = pci_read_config(bus, slot, func, 0x38);
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tmp32 = pci_read_config(bus, slot, func, 0x3c);
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header->Interrupt_Line = tmp32 & 0xff;
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header->Interrupt_PIN = (tmp32 >> 8) & 0xff;
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header->Min_Grant = (tmp32 >> 16) & 0xff;
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header->Max_Latency = (tmp32 >> 24) & 0xff;
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}
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/**
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* @brief 读取type为0x1的pci_to_pci_bridge的header
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* 本函数只应被 pci_read_header()调用
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* @param header 返回的header
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* @param bus 总线号
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* @param slot 插槽号
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* @param func 功能号
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*/
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static void pci_read_pci_to_pci_bridge_header(struct pci_device_structure_pci_to_pci_bridge_t *header, uchar bus, uchar slot, uchar func)
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{
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uint32_t tmp32;
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header->BAR0 = pci_read_config(bus, slot, func, 0x10);
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header->BAR1 = pci_read_config(bus, slot, func, 0x14);
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tmp32 = pci_read_config(bus, slot, func, 0x18);
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header->Primary_Bus_Number = tmp32 & 0xff;
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header->Secondary_Bus_Number = (tmp32 >> 8) & 0xff;
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header->Subordinate_Bus_Number = (tmp32 >> 16) & 0xff;
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header->Secondary_Latency_Timer = (tmp32 >> 24) & 0xff;
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tmp32 = pci_read_config(bus, slot, func, 0x1c);
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header->io_base = tmp32 & 0xff;
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header->io_limit = (tmp32 >> 8) & 0xff;
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header->Secondary_Status = (tmp32 >> 16) & 0xffff;
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tmp32 = pci_read_config(bus, slot, func, 0x20);
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header->Memory_Base = tmp32 & 0xffff;
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header->Memory_Limit = (tmp32 >> 16) & 0xffff;
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tmp32 = pci_read_config(bus, slot, func, 0x24);
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header->Prefetchable_Memory_Base = tmp32 & 0xffff;
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header->Prefetchable_Memory_Limit = (tmp32 >> 16) & 0xffff;
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header->Prefetchable_Base_Upper_32_Bits = pci_read_config(bus, slot, func, 0x28);
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header->Prefetchable_Limit_Upper_32_Bits = pci_read_config(bus, slot, func, 0x2c);
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tmp32 = pci_read_config(bus, slot, func, 0x30);
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header->io_Base_Upper_16_Bits = tmp32 & 0xffff;
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header->io_Limit_Upper_16_Bits = (tmp32 >> 16) & 0xffff;
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tmp32 = pci_read_config(bus, slot, func, 0x34);
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header->Capability_Pointer = tmp32 & 0xff;
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header->reserved0 = (tmp32 >> 8) & 0xff;
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header->reserved1 = (tmp32 >> 16) & 0xffff;
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header->Expansion_ROM_base_address = pci_read_config(bus, slot, func, 0x38);
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tmp32 = pci_read_config(bus, slot, func, 0x3c);
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header->Interrupt_Line = tmp32 & 0xff;
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header->Interrupt_PIN = (tmp32 >> 8) & 0xff;
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header->Bridge_Control = (tmp32 >> 16) & 0xffff;
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}
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/**
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* @brief 读取type为0x2的pci_to_cardbus_bridge的header
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* 本函数只应被 pci_read_header()调用
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* @param header 返回的header
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* @param bus 总线号
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* @param slot 插槽号
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* @param func 功能号
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*/
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static void pci_read_pci_to_cardbus_bridge_header(struct pci_device_structure_pci_to_cardbus_bridge_t *header, uchar bus, uchar slot, uchar func)
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{
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uint32_t tmp32;
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header->CardBus_Socket_ExCa_base_address = pci_read_config(bus, slot, func, 0x10);
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tmp32 = pci_read_config(bus, slot, func, 0x14);
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header->Offset_of_capabilities_list = tmp32 & 0xff;
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header->Reserved = (tmp32 >> 8) & 0xff;
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header->Secondary_status = (tmp32 >> 16) & 0xff;
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tmp32 = pci_read_config(bus, slot, func, 0x18);
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header->PCI_bus_number = tmp32 & 0xff;
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header->CardBus_bus_number = (tmp32 >> 8) & 0xff;
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header->Subordinate_bus_number = (tmp32 >> 16) & 0xff;
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header->CardBus_latency_timer = (tmp32 >> 24) & 0xff;
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header->Memory_Base_Address0 = pci_read_config(bus, slot, func, 0x1c);
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header->Memory_Limit0 = pci_read_config(bus, slot, func, 0x20);
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header->Memory_Base_Address1 = pci_read_config(bus, slot, func, 0x24);
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header->Memory_Limit1 = pci_read_config(bus, slot, func, 0x28);
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header->IO_Base_Address0 = pci_read_config(bus, slot, func, 0x2c);
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header->IO_Limit0 = pci_read_config(bus, slot, func, 0x30);
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header->IO_Base_Address1 = pci_read_config(bus, slot, func, 0x34);
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header->IO_Limit1 = pci_read_config(bus, slot, func, 0x38);
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tmp32 = pci_read_config(bus, slot, func, 0x3c);
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header->Interrupt_Line = tmp32&0xff;
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header->Interrupt_PIN = (tmp32>>8)&0xff;
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header->Bridge_Control = (tmp32>>16)&0xffff;
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tmp32 = pci_read_config(bus, slot, func, 0x40);
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header->Subsystem_Device_ID = tmp32&0xffff;
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header->Subsystem_Vendor_ID = (tmp32>>16)&0xffff;
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header->PC_Card_legacy_mode_base_address_16_bit = pci_read_config(bus, slot, func, 0x44);
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}
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/**
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* @brief 读取pci设备标头
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*
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* @param type 标头类型
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* @param bus 总线号
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* @param slot 插槽号
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* @param func 功能号
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* @return 返回的header
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*/
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void *pci_read_header(int *type, uchar bus, uchar slot, uchar func)
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{
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struct pci_device_structure_header_t common_header;
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uint32_t tmp32;
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// 先读取公共header
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tmp32 = pci_read_config(bus, slot, func, 0x0);
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common_header.Vendor_ID = tmp32 & 0xffff;
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common_header.Device_ID = (tmp32 >> 16) & 0xffff;
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tmp32 = pci_read_config(bus, slot, func, 0x4);
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common_header.Command = tmp32 & 0xffff;
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common_header.Status = (tmp32 >> 16) & 0xffff;
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tmp32 = pci_read_config(bus, slot, func, 0x8);
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common_header.RevisionID = tmp32 & 0xff;
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common_header.ProgIF = (tmp32 >> 8) & 0xff;
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common_header.SubClass = (tmp32 >> 16) & 0xff;
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common_header.Class_code = (tmp32 >> 24) & 0xff;
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tmp32 = pci_read_config(bus, slot, func, 0xc);
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common_header.CacheLineSize = tmp32 & 0xff;
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common_header.LatencyTimer = (tmp32 >> 8) & 0xff;
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common_header.HeaderType = (tmp32 >> 16) & 0xff;
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common_header.BIST = (tmp32 >> 24) & 0xff;
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// 根据公共头部，判断该结构所属的类型
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switch (common_header.Vendor_ID)
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{
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case 0xFFFF: // 设备不可用
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*type = E_DEVICE_INVALID;
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return NULL;
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break;
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case 0x0: // general device
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struct pci_device_structure_general_device_t ret;
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ret.header = common_header;
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pci_read_general_device_header(&ret, bus, slot, func);
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*type = 0x0;
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return &ret;
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break;
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case 0x1:
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struct pci_device_structure_pci_to_pci_bridge_t ret;
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ret.header = common_header;
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*type = 0x1;
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pci_read_pci_to_pci_bridge_header(&ret, bus, slot, func);
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return &ret;
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break;
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case 0x2:
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struct pci_device_structure_pci_to_cardbus_bridge_t ret;
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ret.header = common_header;
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*type = 0x2;
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pci_read_pci_to_cardbus_bridge_header(&ret, bus, slot, func);
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return &ret;
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break;
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default: // 错误的头类型 这里不应该被执行
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kBUG("PCI->pci_read_header(): Invalid header type.");
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*type = E_WRONG_HEADER_TYPE;
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return NULL;
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break;
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}
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}
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void pci_init()
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{
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}
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@ -6,6 +6,9 @@
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#define PORT_PCI_CONFIG_ADDRESS 0xcf8
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#define PORT_PCI_CONFIG_DATA 0xcfc
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#define E_DEVICE_INVALID -1
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#define E_WRONG_HEADER_TYPE -2
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/**
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* @brief 初始化pci驱动
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*
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@ -163,3 +166,14 @@ struct pci_device_structure_pci_to_cardbus_bridge_t
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* @return uint 寄存器值
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*/
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uint pci_read_config(uchar bus, uchar slot, uchar func, uchar offset);
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/**
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* @brief 读取pci设备标头
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*
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* @param type 标头类型
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* @param bus 总线号
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* @param slot 插槽号
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* @param func 功能号
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* @return 返回的header的指针
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*/
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void* pci_read_header(int *type, uchar bus, uchar slot, uchar func);
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