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new: stop legacy
This commit is contained in:
fslongjin
parent
fe42398090
commit
7af8711bbb
@ -10,22 +10,68 @@ spinlock_t xhci_controller_init_lock; // xhci控制器初始化锁(在usb_init
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static int xhci_ctrl_count = 0; // xhci控制器计数
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static struct xhci_host_controller_t xhci_hc[MAX_XHCI_HOST_CONTROLLERS] = {0};
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static struct xhci_host_controller_t xhci_hc[XHCI_MAX_HOST_CONTROLLERS] = {0};
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/*
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注意！！！
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尽管采用MMI/O的方式访问寄存器，但是对于指定大小的寄存器，
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在发起读请求的时候，只能从寄存器的起始地址位置开始读取。
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例子：不能在一个32bit的寄存器中的偏移量8的位置开始读取1个字节
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这种情况下，我们必须从32bit的寄存器的0地址处开始读取32bit，然后通过移位的方式得到其中的字节。
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*/
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#define xhci_read_cap_reg8(id, offset) (*(uint8_t *)(xhci_hc[id].vbase + offset))
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#define xhci_get_ptr_cap_reg8(id, offset) ((uint8_t *)(xhci_hc[id].vbase + offset))
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#define xhci_write_cap_reg8(id, offset, value) (*(uint8_t *)(xhci_hc[id].vbase + offset) = (uint8_t)value)
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#define xhci_read_cap_reg32(id, offset) (*(uint32_t *)(xhci_hc[id].vbase + offset))
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#define xhci_get_ptr_cap_reg32(id, offset) ((uint32_t *)(xhci_hc[id].vbase + offset))
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#define xhci_write_cap_reg32(id, offset, value) (*(uint32_t *)(xhci_hc[id].vbase + offset) = (uint32_t)value)
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#define xhci_read_cap_reg64(id, offset) (*(uint64_t *)(xhci_hc[id].vbase + offset))
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#define xhci_get_ptr_reg64(id, offset) ((uint64_t *)(xhci_hc[id].vbase + offset))
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#define xhci_write_cap_reg64(id, offset, value) (*(uint64_t *)(xhci_hc[id].vbase + offset) = (uint64_t)value)
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#define xhci_read_op_reg8(id, offset) (*(uint8_t *)(xhci_hc[id].vbase_op + offset))
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#define xhci_get_ptr_op_reg8(id, offset) ((uint8_t *)(xhci_hc[id].vbase_op + offset))
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#define xhci_write_op_reg8(id, offset, value) (*(uint8_t *)(xhci_hc[id].vbase_op + offset) = (uint8_t)value)
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#define xhci_read_op_reg32(id, offset) (*(uint32_t *)(xhci_hc[id].vbase_op + offset))
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#define xhci_get_ptr_op_reg32(id, offset) ((uint32_t *)(xhci_hc[id].vbase_op + offset))
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#define xhci_write_op_reg32(id, offset, value) (*(uint32_t *)(xhci_hc[id].vbase_op + offset) = (uint32_t)value)
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#define xhci_read_op_reg64(id, offset) (*(uint64_t *)(xhci_hc[id].vbase_op + offset))
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#define xhci_get_ptr_op_reg64(id, offset) ((uint64_t *)(xhci_hc[id].vbase_op + offset))
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#define xhci_write_op_reg64(id, offset, value) (*(uint64_t *)(xhci_hc[id].vbase_op + offset) = (uint64_t)value)
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#define FAIL_ON(value, to) \
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do \
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{ \
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if (unlikely(value != 0)) \
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goto to; \
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} while (0)
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/**
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* @brief 在controller数组之中寻找可用插槽
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*
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* 注意：该函数只能被获得init锁的进程所调用
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* @return int 可用id(无空位时返回-1)
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*/
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static int xhci_hc_find_available_id()
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{
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if (unlikely(xhci_ctrl_count >= XHCI_MAX_HOST_CONTROLLERS))
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return -1;
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for (int i = 0; i < XHCI_MAX_HOST_CONTROLLERS; ++i)
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{
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if (xhci_hc[i].pci_dev_hdr = NULL)
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return i;
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}
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return -1;
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}
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/**
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* @brief 停止xhci主机控制器
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*
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@ -34,7 +80,21 @@ static struct xhci_host_controller_t xhci_hc[MAX_XHCI_HOST_CONTROLLERS] = {0};
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*/
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static int xhci_hc_stop(int id)
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{
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// todo: 停止usb控制器
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// 判断是否已经停止
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if (unlikely((xhci_read_op_reg32(id, XHCI_OPS_USBSTS) & (1 << 0)) == 1))
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return 0;
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xhci_write_op_reg32(id, XHCI_OPS_USBCMD, 0x00000000);
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char timeout = 17;
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while ((xhci_read_op_reg32(id, XHCI_OPS_USBSTS) & (1 << 0)) == 0)
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{
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usleep(1000);
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if (--timeout == 0)
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return -ETIMEDOUT;
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}
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return 0;
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}
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/**
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@ -51,23 +111,94 @@ static int xhci_hc_reset(int id)
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{
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// 未置位，需要先尝试停止usb主机控制器
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retval = xhci_hc_stop(id);
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if (retval)
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if (unlikely(retval))
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return retval;
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}
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int timeout = 500; // wait 500ms
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// reset
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xhci_write_cap_reg32(id, XHCI_OPS_USBCMD, (1 << 1));
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usleep(1000);
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xhci_write_op_reg32(id, XHCI_OPS_USBCMD, (1 << 1));
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while (xhci_read_op_reg32(id, XHCI_OPS_USBCMD) & (1 << 1))
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{
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usleep(1000);
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if (--timeout == 0)
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return -ETIMEDOUT;
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}
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kdebug("reset done!, timeout=%d", timeout);
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// kdebug("reset done!, timeout=%d", timeout);
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return retval;
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}
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/**
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* @brief 停止指定xhci控制器的legacy support
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*
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* @param id 控制器id
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* @return int
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*/
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static int xhci_hc_stop_legacy(int id)
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{
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uint64_t current_offset = xhci_hc[id].ext_caps_off;
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do
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{
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// 判断当前entry是否为legacy support entry
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if (xhci_read_cap_reg8(id, current_offset) == XHCI_XECP_ID_LEGACY)
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{
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// 接管控制权
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xhci_write_cap_reg32(id, current_offset, xhci_read_cap_reg32(id, current_offset) | XHCI_XECP_LEGACY_OS_OWNED);
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// 等待响应完成
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int timeout = XHCI_XECP_LEGACY_TIMEOUT;
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while ((xhci_read_cap_reg32(id, current_offset) & XHCI_XECP_LEGACY_OWNING_MASK) != XHCI_XECP_LEGACY_OS_OWNED)
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{
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usleep(1000);
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if (--timeout == 0)
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{
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kerror("The BIOS doesn't stop legacy support.");
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return -ETIMEDOUT;
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}
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}
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// 处理完成
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return 0;
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}
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// 读取下一个entry的偏移增加量
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int next_off = ((xhci_read_cap_reg32(id, current_offset) & 0xff00) >> 8) << 2;
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// 将指针跳转到下一个entry
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current_offset = next_off ? (current_offset + next_off) : 0;
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} while (current_offset);
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// 当前controller不存在legacy支持，也问题不大，不影响
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return 0;
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}
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/**
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* @brief 配对xhci主机控制器的usb2、usb3端口
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*
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* @param id 主机控制器id
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* @return int 返回码
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*/
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static int xhci_hc_pair_ports(int id)
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{
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struct xhci_caps_HCCPARAMS1_reg_t hcc1;
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struct xhci_caps_HCCPARAMS2_reg_t hcc2;
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struct xhci_caps_HCSPARAMS1_reg_t hcs1;
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struct xhci_caps_HCSPARAMS2_reg_t hcs2;
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memcpy(&hcc1, xhci_get_ptr_cap_reg32(id, XHCI_CAPS_HCCPARAMS1), sizeof(struct xhci_caps_HCCPARAMS1_reg_t));
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memcpy(&hcc2, xhci_get_ptr_cap_reg32(id, XHCI_CAPS_HCCPARAMS2), sizeof(struct xhci_caps_HCCPARAMS1_reg_t));
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memcpy(&hcs1, xhci_get_ptr_cap_reg32(id, XHCI_CAPS_HCSPARAMS1), sizeof(struct xhci_caps_HCCPARAMS1_reg_t));
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memcpy(&hcs2, xhci_get_ptr_cap_reg32(id, XHCI_CAPS_HCSPARAMS2), sizeof(struct xhci_caps_HCCPARAMS1_reg_t));
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// 从hcs1获取端口数量
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xhci_hc[id].port_num = hcs1.max_ports;
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kinfo("Found %d ports on xhci root hub.", hcs1.max_ports);
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// 找到所有的端口并标记其端口信息
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return 0;
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}
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/**
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* @brief 初始化xhci控制器
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*
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@ -75,23 +206,39 @@ static int xhci_hc_reset(int id)
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*/
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void xhci_init(struct pci_device_structure_general_device_t *dev_hdr)
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{
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if (xhci_ctrl_count >= XHCI_MAX_HOST_CONTROLLERS)
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{
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kerror("Initialize xhci controller failed: exceed the limit of max controllers.");
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return;
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}
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spin_lock(&xhci_controller_init_lock);
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kinfo("Initializing xhci host controller: bus=%#02x, device=%#02x, func=%#02x, VendorID=%#04x, irq_line=%d, irq_pin=%d", dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, dev_hdr->header.Vendor_ID, dev_hdr->Interrupt_Line, dev_hdr->Interrupt_PIN);
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xhci_hc[xhci_ctrl_count].controller_id = xhci_ctrl_count;
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xhci_hc[xhci_ctrl_count].pci_dev_hdr = dev_hdr;
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int cid = xhci_hc_find_available_id();
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memset(&xhci_hc[cid], 0, sizeof(struct xhci_host_controller_t));
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xhci_hc[cid].controller_id = cid;
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xhci_hc[cid].pci_dev_hdr = dev_hdr;
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pci_write_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0x4, 0x0006); // mem I/O access enable and bus master enable
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// 为当前控制器映射寄存器地址空间
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xhci_hc[xhci_ctrl_count].vbase = SPECIAL_MEMOEY_MAPPING_VIRT_ADDR_BASE + XHCI_MAPPING_OFFSET + PAGE_2M_SIZE * xhci_hc[xhci_ctrl_count].controller_id;
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xhci_hc[cid].vbase = SPECIAL_MEMOEY_MAPPING_VIRT_ADDR_BASE + XHCI_MAPPING_OFFSET + PAGE_2M_SIZE * xhci_hc[cid].controller_id;
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kdebug("dev_hdr->BAR0 & (~0xf)=%#018lx", dev_hdr->BAR0 & (~0xf));
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mm_map_phys_addr(xhci_hc[xhci_ctrl_count].vbase, dev_hdr->BAR0 & (~0xf), 65536, PAGE_KERNEL_PAGE | PAGE_PWT | PAGE_PCD, true);
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mm_map_phys_addr(xhci_hc[cid].vbase, dev_hdr->BAR0 & (~0xf), 65536, PAGE_KERNEL_PAGE | PAGE_PWT | PAGE_PCD, true);
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// 读取xhci控制寄存器
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uint16_t iversion = *(uint16_t *)(xhci_hc[xhci_ctrl_count].vbase + XHCI_CAPS_HCIVERSION);
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uint16_t iversion = *(uint16_t *)(xhci_hc[cid].vbase + XHCI_CAPS_HCIVERSION);
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uint32_t hcc1 = xhci_read_cap_reg32(cid, XHCI_CAPS_HCCPARAMS1);
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// 计算operational registers的地址
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xhci_hc[xhci_ctrl_count].vbase_op = xhci_hc[xhci_ctrl_count].vbase + xhci_read_cap_reg8(xhci_ctrl_count, XHCI_CAPS_CAPLENGTH);
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xhci_hc[cid].vbase_op = xhci_hc[cid].vbase + xhci_read_cap_reg8(cid, XHCI_CAPS_CAPLENGTH);
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xhci_hc[cid].db_offset = xhci_read_cap_reg32(cid, XHCI_CAPS_DBOFF) & (~0x3); // bits [1:0] reserved
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xhci_hc[cid].rts_offset = xhci_read_cap_reg32(cid, XHCI_CAPS_RTSOFF) & (~0x1f); // bits [4:0] reserved.
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xhci_hc[cid].ext_caps_off = ((hcc1 & 0xffff0000) >> 16) * 4;
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xhci_hc[cid].context_size = (hcc1 & (1 << 2)) ? 64 : 32;
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if (iversion < 0x95)
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{
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@ -107,17 +254,21 @@ void xhci_init(struct pci_device_structure_general_device_t *dev_hdr)
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pci_write_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0xd8, 0xffffffff);
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pci_write_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0xd0, 0xffffffff);
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}
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xhci_hc_reset(xhci_ctrl_count);
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// 重置xhci控制器
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FAIL_ON(xhci_hc_reset(cid), failed);
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FAIL_ON(xhci_hc_stop_legacy(cid), failed);
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FAIL_ON(xhci_hc_pair_ports(cid), failed);
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++xhci_ctrl_count;
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spin_unlock(&xhci_controller_init_lock);
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return;
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failed:;
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// 取消地址映射
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mm_unmap(xhci_hc[xhci_ctrl_count].vbase, 65536);
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mm_unmap(xhci_hc[cid].vbase, 65536);
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// 清空数组
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memset((void *)&xhci_hc[xhci_ctrl_count], 0, sizeof(struct xhci_host_controller_t));
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memset((void *)&xhci_hc[cid], 0, sizeof(struct xhci_host_controller_t));
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kerror("Failed to initialize controller: bus=%d, dev=%d, func=%d", dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func);
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spin_unlock(&xhci_controller_init_lock);
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}
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@ -2,7 +2,8 @@
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#include <driver/usb/usb.h>
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#include <driver/pci/pci.h>
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#define MAX_XHCI_HOST_CONTROLLERS 8
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#define XHCI_MAX_HOST_CONTROLLERS 8
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#define XHCI_MAX_ROOT_HUB_PORTS 128
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// xhci Capability Registers offset
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#define XHCI_CAPS_CAPLENGTH 0x00 // Cap 寄存器组的长度
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@ -43,20 +44,20 @@ struct xhci_caps_HCSPARAMS3_reg_t
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struct xhci_caps_HCCPARAMS1_reg_t
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{
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unsigned ac64 : 1; // 64-bit addressing capability
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unsigned bnc : 1; // bw negotiation capability
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unsigned csz : 1; // context size
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unsigned ppc : 1; // 端口电源控制
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unsigned pind : 1; // port indicators
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unsigned lhrc : 1; // Light HC reset capability
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unsigned ltc : 1; // latency tolerance messaging capability
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unsigned nss : 1; // no secondary SID support
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unsigned int ac64 : 1; // 64-bit addressing capability
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unsigned int bnc : 1; // bw negotiation capability
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unsigned int csz : 1; // context size
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unsigned int ppc : 1; // 端口电源控制
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unsigned int pind : 1; // port indicators
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unsigned int lhrc : 1; // Light HC reset capability
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unsigned int ltc : 1; // latency tolerance messaging capability
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unsigned int nss : 1; // no secondary SID support
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unsigned pae : 1; // parse all event data
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unsigned spc : 1; // Stopped - Short packet capability
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unsigned sec : 1; // Stopped EDTLA capability
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unsigned cfc : 1; // Continuous Frame ID capability
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unsigned MaxPSASize : 4; // Max Primary Stream Array Size
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unsigned int pae : 1; // parse all event data
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unsigned int spc : 1; // Stopped - Short packet capability
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unsigned int sec : 1; // Stopped EDTLA capability
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unsigned int cfc : 1; // Continuous Frame ID capability
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unsigned int MaxPSASize : 4; // Max Primary Stream Array Size
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uint16_t xECP; // xhci extended capabilities pointer
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@ -136,6 +137,23 @@ struct xhci_ops_config_reg_t
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unsigned rsvd_psvd : 22; // Reserved and Preserved
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} __attribute__((packed));
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// xhci Extended Capabilities List ID
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// ID 部分的含义定义
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#define XHCI_XECP_ID_RESERVED 0
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#define XHCI_XECP_ID_LEGACY 1 // USB Legacy Support
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#define XHCI_XECP_ID_PROTOCAL 2 // Supported protocal
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#define XHCI_XECP_ID_POWER 3 // Extended power management
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#define XHCI_XECP_ID_IOVIRT 4 // I/0 virtualization
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#define XHCI_XECP_ID_MSG 5 // Message interrupt
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#define XHCI_XECP_ID_LOCAL_MEM 6 // local memory
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#define XHCI_XECP_ID_DEBUG 10 // USB Debug capability
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#define XHCI_XECP_ID_EXTMSG 17 // Extended message interrupt
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#define XHCI_XECP_LEGACY_TIMEOUT 10 // 设置legacy状态的等待时间
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#define XHCI_XECP_LEGACY_BIOS_OWNED (1 << 16) // 当bios控制着该hc时，该位被置位
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#define XHCI_XECP_LEGACY_OS_OWNED (1 << 24) // 当系统控制着该hc时，该位被置位
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#define XHCI_XECP_LEGACY_OWNING_MASK (XHCI_XECP_LEGACY_BIOS_OWNED | XHCI_XECP_LEGACY_OS_OWNED)
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/**
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* @brief xhci端口信息
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*
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@ -154,7 +172,14 @@ struct xhci_host_controller_t
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int controller_id; // 操作系统给controller的编号
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uint64_t vbase; // 虚拟地址base（bar0映射到的虚拟地址）
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uint64_t vbase_op; // Operational registers 起始虚拟地址
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struct xhci_port_info_t *ports; // 指向端口信息数组的指针
|
||||
uint32_t rts_offset; // Runtime Register Space offset
|
||||
uint32_t db_offset; // Doorbell offset
|
||||
uint32_t ext_caps_off; // 扩展能力寄存器偏移量
|
||||
uint8_t context_size; // 上下文大小
|
||||
uint16_t port_num; // 总的端口数量
|
||||
uint8_t port_num_u2; // usb 2.0端口数量
|
||||
uint8_t port_num_u3; // usb 3端口数量
|
||||
struct xhci_port_info_t ports[XHCI_MAX_ROOT_HUB_PORTS]; // 指向端口信息数组的指针
|
||||
};
|
||||
|
||||
/**
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user