mirror of
https://github.com/DragonOS-Community/DragonOS.git
synced 2025-06-09 02:46:47 +00:00
565 lines
17 KiB
C
565 lines
17 KiB
C
#include "ahci.h"
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#include "../../../common/kprint.h"
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#include "../../../mm/slab.h"
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#include <syscall/syscall.h>
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#include <syscall/syscall_num.h>
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struct pci_device_structure_header_t *ahci_devs[MAX_AHCI_DEVICES];
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struct block_device_request_queue ahci_req_queue;
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uint32_t count_ahci_devices = 0;
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uint64_t ahci_port_base_vaddr; // 端口映射base addr
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uint64_t ahci_port_base_phys_addr; // 端口映射的物理基地址（ahci控制器的参数的地址都是物理地址）
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static void start_cmd(HBA_PORT *port);
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static void stop_cmd(HBA_PORT *port);
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static void port_rebase(HBA_PORT *port, int portno);
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static long ahci_query_disk();
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// Find a free command list slot
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static int ahci_find_cmdslot(HBA_PORT *port);
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// 计算HBA_MEM的虚拟内存地址
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#define cal_HBA_MEM_VIRT_ADDR(device_num) (AHCI_MAPPING_BASE + (ul)(((struct pci_device_structure_general_device_t *)(ahci_devs[device_num]))->BAR5 - ((((struct pci_device_structure_general_device_t *)(ahci_devs[0]))->BAR5) & PAGE_2M_MASK)))
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/**
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* @brief 初始化ahci模块
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*
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*/
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void ahci_init()
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{
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kinfo("Initializing AHCI...");
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pci_get_device_structure(0x1, 0x6, ahci_devs, &count_ahci_devices);
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if (count_ahci_devices == 0)
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{
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kwarn("There is no AHCI device found on this computer!");
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return;
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}
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// 映射ABAR
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kdebug("phys_2_virt(ahci_devs[0])= %#018lx", (ahci_devs[0]));
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kdebug("((struct pci_device_structure_general_device_t *)phys_2_virt(ahci_devs[0])))->BAR5= %#018lx", ((struct pci_device_structure_general_device_t *)(ahci_devs[0]))->BAR5);
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uint32_t bar5 = ((struct pci_device_structure_general_device_t *)(ahci_devs[0]))->BAR5;
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mm_map_phys_addr(AHCI_MAPPING_BASE, (ul)(bar5)&PAGE_2M_MASK, PAGE_2M_SIZE, PAGE_KERNEL_PAGE | PAGE_PWT | PAGE_PCD);
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kdebug("ABAR mapped!");
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for (int i = 0; i < count_ahci_devices; ++i)
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{
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// kdebug("[%d] class_code=%d, sub_class=%d, progIF=%d, ABAR=%#010lx", i, ahci_devs[i]->Class_code, ahci_devs[i]->SubClass, ahci_devs[i]->ProgIF, ((struct pci_device_structure_general_device_t *)(ahci_devs[i]))->BAR5);
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// 赋值HBA_MEM结构体
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ahci_devices[i].dev_struct = ahci_devs[i];
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ahci_devices[i].hba_mem = (HBA_MEM *)(cal_HBA_MEM_VIRT_ADDR(i));
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kdebug("ahci_devices[i].hba_mem = %#018lx", (ul)ahci_devices[i].hba_mem);
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}
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// todo: 支持多个ahci控制器。
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ahci_port_base_vaddr = (uint64_t)kmalloc(1048576, 0);
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kdebug("ahci_port_base_vaddr=%#018lx", ahci_port_base_vaddr);
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ahci_probe_port(0);
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port_rebase(&ahci_devices[0].hba_mem->ports[0], 0);
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// 初始化请求队列
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ahci_req_queue.in_service = NULL;
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wait_queue_init(&ahci_req_queue.wait_queue_list, NULL);
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ahci_req_queue.request_count = 0;
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kinfo("AHCI initialized.");
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}
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// Check device type
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static int check_type(HBA_PORT *port)
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{
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uint32_t ssts = port->ssts;
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uint8_t ipm = (ssts >> 8) & 0x0F;
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uint8_t det = ssts & 0x0F;
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if (det != HBA_PORT_DET_PRESENT) // Check drive status
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return AHCI_DEV_NULL;
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if (ipm != HBA_PORT_IPM_ACTIVE)
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return AHCI_DEV_NULL;
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switch (port->sig)
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{
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case SATA_SIG_ATAPI:
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return AHCI_DEV_SATAPI;
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case SATA_SIG_SEMB:
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return AHCI_DEV_SEMB;
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case SATA_SIG_PM:
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return AHCI_DEV_PM;
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default:
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return AHCI_DEV_SATA;
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}
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}
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/**
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* @brief 检测端口连接的设备的类型
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*
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* @param device_num ahci控制器号
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*/
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static void ahci_probe_port(const uint32_t device_num)
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{
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HBA_MEM *abar = ahci_devices[device_num].hba_mem;
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uint32_t pi = abar->pi;
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for (int i = 0; i < 32; ++i, (pi >>= 1))
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{
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if (pi & 1)
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{
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uint dt = check_type(&abar->ports[i]);
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ahci_devices[i].type = dt;
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if (dt == AHCI_DEV_SATA)
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{
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kdebug("SATA drive found at port %d", i);
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}
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else if (dt == AHCI_DEV_SATAPI)
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{
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kdebug("SATAPI drive found at port %d", i);
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}
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else if (dt == AHCI_DEV_SEMB)
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{
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kdebug("SEMB drive found at port %d", i);
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}
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else if (dt == AHCI_DEV_PM)
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{
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kdebug("PM drive found at port %d", i);
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}
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else
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{
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// kdebug("No drive found at port %d", i);
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}
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}
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}
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}
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// Start command engine
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static void start_cmd(HBA_PORT *port)
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{
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// Wait until CR (bit15) is cleared
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while ((port->cmd) & HBA_PxCMD_CR)
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;
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// Set FRE (bit4) and ST (bit0)
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port->cmd |= HBA_PxCMD_FRE;
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port->cmd |= HBA_PxCMD_ST;
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}
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// Stop command engine
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static void stop_cmd(HBA_PORT *port)
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{
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// Clear ST (bit0)
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port->cmd &= ~HBA_PxCMD_ST;
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// Clear FRE (bit4)
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port->cmd &= ~HBA_PxCMD_FRE;
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// Wait until FR (bit14), CR (bit15) are cleared
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while (1)
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{
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if (port->cmd & HBA_PxCMD_FR)
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continue;
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if (port->cmd & HBA_PxCMD_CR)
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continue;
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break;
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}
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}
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static void port_rebase(HBA_PORT *port, int portno)
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{
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// Before rebasing Port memory space, OS must wait for current pending commands to finish
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// and tell HBA to stop receiving FIS from the port. Otherwise an accidently incoming FIS may be
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// written into a partially configured memory area.
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stop_cmd(port); // Stop command engine
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// Command list offset: 1K*portno
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// Command list entry size = 32
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// Command list entry maxim count = 32
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// Command list maxim size = 32*32 = 1K per port
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port->clb = virt_2_phys(ahci_port_base_vaddr + (portno << 10));
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memset((void *)(phys_2_virt(port->clb)), 0, 1024);
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// FIS offset: 32K+256*portno
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// FIS entry size = 256 bytes per port
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port->fb = virt_2_phys(ahci_port_base_vaddr + (32 << 10) + (portno << 8));
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memset((void *)(phys_2_virt(port->fb)), 0, 256);
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// Command table offset: 40K + 8K*portno
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// Command table size = 256*32 = 8K per port
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HBA_CMD_HEADER *cmdheader = (HBA_CMD_HEADER *)(phys_2_virt(port->clb));
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for (int i = 0; i < 32; ++i)
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{
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cmdheader[i].prdtl = 8; // 8 prdt entries per command table
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// 256 bytes per command table, 64+16+48+16*8
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// Command table offset: 40K + 8K*portno + cmdheader_index*256
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cmdheader[i].ctba = virt_2_phys((ahci_port_base_vaddr + (40 << 10) + (portno << 13) + (i << 8)));
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memset((void *)phys_2_virt(cmdheader[i].ctba), 0, 256);
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}
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start_cmd(port); // Start command engine
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}
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/**
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* @brief read data from SATA device using 48bit LBA address
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*
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* @param port HBA PORT
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* @param startl low 32bits of start addr
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* @param starth high 32bits of start addr
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* @param count total sectors to read
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* @param buf buffer
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* @return true done
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* @return false failed
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*/
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static bool ahci_read(HBA_PORT *port, uint32_t startl, uint32_t starth, uint32_t count, uint64_t buf)
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{
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port->is = (uint32_t)-1; // Clear pending interrupt bits
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int spin = 0; // Spin lock timeout counter
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int slot = ahci_find_cmdslot(port);
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if (slot == -1)
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return E_NOEMPTYSLOT;
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HBA_CMD_HEADER *cmdheader = (HBA_CMD_HEADER *)phys_2_virt(port->clb);
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cmdheader += slot;
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cmdheader->cfl = sizeof(FIS_REG_H2D) / sizeof(uint32_t); // Command FIS size
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cmdheader->w = 0; // Read from device
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cmdheader->prdtl = (uint16_t)((count - 1) >> 4) + 1; // PRDT entries count
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HBA_CMD_TBL *cmdtbl = (HBA_CMD_TBL *)phys_2_virt(cmdheader->ctba);
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memset(cmdtbl, 0, sizeof(HBA_CMD_TBL) + (cmdheader->prdtl - 1) * sizeof(HBA_PRDT_ENTRY));
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// 8K bytes (16 sectors) per PRDT
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int i;
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for (i = 0; i < cmdheader->prdtl - 1; ++i)
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{
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cmdtbl->prdt_entry[i].dba = virt_2_phys(buf);
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cmdtbl->prdt_entry[i].dbc = 8 * 1024 - 1; // 8K bytes (this value should always be set to 1 less than the actual value)
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cmdtbl->prdt_entry[i].i = 1;
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buf += 4 * 1024; // 4K uint16_ts
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count -= 16; // 16 sectors
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}
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// Last entry
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cmdtbl->prdt_entry[i].dba = virt_2_phys(buf);
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cmdtbl->prdt_entry[i].dbc = (count << 9) - 1; // 512 bytes per sector
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cmdtbl->prdt_entry[i].i = 1;
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// Setup command
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FIS_REG_H2D *cmdfis = (FIS_REG_H2D *)(&cmdtbl->cfis);
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cmdfis->fis_type = FIS_TYPE_REG_H2D;
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cmdfis->c = 1; // Command
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cmdfis->command = AHCI_CMD_READ_DMA_EXT;
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cmdfis->lba0 = (uint8_t)startl;
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cmdfis->lba1 = (uint8_t)(startl >> 8);
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cmdfis->lba2 = (uint8_t)(startl >> 16);
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cmdfis->device = 1 << 6; // LBA mode
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cmdfis->lba3 = (uint8_t)(startl >> 24);
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cmdfis->lba4 = (uint8_t)starth;
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cmdfis->lba5 = (uint8_t)(starth >> 8);
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cmdfis->countl = count & 0xFF;
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cmdfis->counth = (count >> 8) & 0xFF;
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// The below loop waits until the port is no longer busy before issuing a new command
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while ((port->tfd & (AHCI_DEV_BUSY | AHCI_DEV_DRQ)) && spin < 1000000)
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{
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spin++;
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}
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if (spin == 1000000)
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{
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kerror("Port is hung");
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return E_PORT_HUNG;
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}
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port->ci = 1 << slot; // Issue command
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current_pcb->flags |= PF_NEED_SCHED;
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sched_cfs();
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int retval = AHCI_SUCCESS;
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// Wait for completion
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while (1)
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{
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// In some longer duration reads, it may be helpful to spin on the DPS bit
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// in the PxIS port field as well (1 << 5)
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if ((port->ci & (1 << slot)) == 0)
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break;
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if (port->is & HBA_PxIS_TFES) // Task file error
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{
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kerror("Read disk error");
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retval = E_TASK_FILE_ERROR;
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break;
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}
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}
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// Check again
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if (port->is & HBA_PxIS_TFES)
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{
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kerror("Read disk error");
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retval = E_TASK_FILE_ERROR;
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}
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enter_syscall_int(SYS_AHCI_END_REQ, 0, 0, 0, 0, 0, 0, 0, 0);
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return retval;
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}
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static bool ahci_write(HBA_PORT *port, uint32_t startl, uint32_t starth, uint32_t count,
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uint64_t buf)
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{
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// kdebug("ahci write");
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port->is = 0xffff; // Clear pending interrupt bits
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int slot = ahci_find_cmdslot(port);
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if (slot == -1)
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return E_NOEMPTYSLOT;
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HBA_CMD_HEADER *cmdheader = (HBA_CMD_HEADER *)phys_2_virt(port->clb);
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cmdheader += slot;
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cmdheader->cfl = sizeof(FIS_REG_H2D) / sizeof(uint32_t); // Command FIS size
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cmdheader->w = 1;
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cmdheader->c = 1;
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cmdheader->p = 1;
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cmdheader->prdtl = (uint16_t)((count - 1) >> 4) + 1; // PRDT entries count
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HBA_CMD_TBL *cmdtbl = (HBA_CMD_TBL *)phys_2_virt(cmdheader->ctba);
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memset(cmdtbl, 0, sizeof(HBA_CMD_TBL) + (cmdheader->prdtl - 1) * sizeof(HBA_PRDT_ENTRY));
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int i = 0;
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for (i = 0; i < cmdheader->prdtl - 1; ++i)
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{
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cmdtbl->prdt_entry[i].dba = virt_2_phys(buf);
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cmdtbl->prdt_entry[i].dbc = 8 * 1024 - 1; // 8K bytes
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cmdtbl->prdt_entry[i].i = 0;
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buf += 4 * 1024; // 4K words
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count -= 16; // 16 sectors
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}
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cmdtbl->prdt_entry[i].dba = virt_2_phys(buf);
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cmdtbl->prdt_entry[i].dbc = count << 9; // 512 bytes per sector
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cmdtbl->prdt_entry[i].i = 0;
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FIS_REG_H2D *cmdfis = (FIS_REG_H2D *)(&cmdtbl->cfis);
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cmdfis->fis_type = FIS_TYPE_REG_H2D;
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cmdfis->c = 1; // Command
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cmdfis->command = AHCI_CMD_WRITE_DMA_EXT;
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cmdfis->lba0 = (uint8_t)startl;
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cmdfis->lba1 = (uint8_t)(startl >> 8);
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cmdfis->lba2 = (uint8_t)(startl >> 16);
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cmdfis->lba3 = (uint8_t)(startl >> 24);
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cmdfis->lba4 = (uint8_t)starth;
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cmdfis->lba5 = (uint8_t)(starth >> 8);
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cmdfis->device = 1 << 6; // LBA mode
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cmdfis->countl = count & 0xff;
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cmdfis->counth = count >> 8;
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// printk("[slot]{%d}", slot);
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port->ci = 1; // Issue command
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current_pcb->flags |= PF_NEED_SCHED;
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sched_cfs();
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int retval = AHCI_SUCCESS;
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while (1)
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{
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// In some longer duration reads, it may be helpful to spin on the DPS bit
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// in the PxIS port field as well (1 << 5)
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if ((port->ci & (1 << slot)) == 0)
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break;
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if (port->is & HBA_PxIS_TFES)
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{ // Task file error
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kerror("Write disk error");
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retval = E_TASK_FILE_ERROR;
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break;
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}
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}
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if (port->is & HBA_PxIS_TFES)
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{
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kerror("Write disk error");
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retval = E_TASK_FILE_ERROR;
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}
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// kdebug("ahci write retval=%d", retval);
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enter_syscall_int(SYS_AHCI_END_REQ, 0, 0, 0, 0, 0, 0, 0, 0);
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return retval;
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}
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// Find a free command list slot
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static int ahci_find_cmdslot(HBA_PORT *port)
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{
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// If not set in SACT and CI, the slot is free
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uint32_t slots = (port->sact | port->ci);
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int num_of_cmd_clots = (ahci_devices[0].hba_mem->cap & 0x0f00) >> 8; // bit 12-8
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for (int i = 0; i < num_of_cmd_clots; i++)
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{
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if ((slots & 1) == 0)
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return i;
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slots >>= 1;
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}
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kerror("Cannot find free command list entry");
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return -1;
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}
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long ahci_open()
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{
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return 0;
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}
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long ahci_close()
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{
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return 0;
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}
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/**
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* @brief 创建ahci磁盘请求包
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*
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* @param cmd 控制命令
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* @param base_addr 48位LBA地址
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* @param count total sectors to read
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* @param buf 缓冲区线性地址
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* @param ahci_ctrl_num ahci控制器号
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* @param port_num ahci控制器端口号
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* @return struct block_device_request_packet*
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*/
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static struct ahci_request_packet_t *ahci_make_request(long cmd, uint64_t base_addr, uint64_t count, uint64_t buffer, uint8_t ahci_ctrl_num, uint8_t port_num)
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{
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struct ahci_request_packet_t *pack = (struct ahci_request_packet_t *)kmalloc(sizeof(struct ahci_request_packet_t), 0);
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wait_queue_init(&pack->blk_pak.wait_queue, current_pcb);
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pack->blk_pak.device_type = BLK_TYPE_AHCI;
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// 由于ahci不需要中断即可读取磁盘，因此end handler为空
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switch (cmd)
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{
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case AHCI_CMD_READ_DMA_EXT:
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pack->blk_pak.end_handler = NULL;
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pack->blk_pak.cmd = AHCI_CMD_READ_DMA_EXT;
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break;
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case AHCI_CMD_WRITE_DMA_EXT:
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pack->blk_pak.end_handler = NULL;
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pack->blk_pak.cmd = AHCI_CMD_WRITE_DMA_EXT;
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break;
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default:
|
||
pack->blk_pak.end_handler = NULL;
|
||
pack->blk_pak.cmd = cmd;
|
||
break;
|
||
}
|
||
|
||
pack->blk_pak.LBA_start = base_addr;
|
||
pack->blk_pak.count = count;
|
||
pack->blk_pak.buffer_vaddr = buffer;
|
||
|
||
pack->ahci_ctrl_num = ahci_ctrl_num;
|
||
pack->port_num = port_num;
|
||
return pack;
|
||
}
|
||
|
||
/**
|
||
* @brief 结束磁盘请求
|
||
*
|
||
*/
|
||
void ahci_end_request()
|
||
{
|
||
ahci_req_queue.in_service->wait_queue.pcb->state = PROC_RUNNING;
|
||
// ahci_req_queue.in_service->wait_queue.pcb->flags |= PF_NEED_SCHED;
|
||
// current_pcb->flags |= PF_NEED_SCHED;
|
||
kfree((uint64_t *)ahci_req_queue.in_service);
|
||
ahci_req_queue.in_service = NULL;
|
||
|
||
// 进行下一轮的磁盘请求 （由于未实现单独的io调度器，这里会造成长时间的io等待）
|
||
if (ahci_req_queue.request_count > 0)
|
||
ahci_query_disk();
|
||
}
|
||
|
||
static long ahci_query_disk()
|
||
{
|
||
wait_queue_node_t *wait_queue_tmp = container_of(list_next(&ahci_req_queue.wait_queue_list.wait_list), wait_queue_node_t, wait_list);
|
||
struct ahci_request_packet_t *pack = (struct ahci_request_packet_t *)container_of(wait_queue_tmp, struct block_device_request_packet, wait_queue);
|
||
|
||
ahci_req_queue.in_service = (struct block_device_request_packet *)pack;
|
||
list_del(&(ahci_req_queue.in_service->wait_queue.wait_list));
|
||
--ahci_req_queue.request_count;
|
||
|
||
long ret_val;
|
||
|
||
|
||
switch (pack->blk_pak.cmd)
|
||
{
|
||
case AHCI_CMD_READ_DMA_EXT:
|
||
ret_val = ahci_read(&(ahci_devices[pack->ahci_ctrl_num].hba_mem->ports[pack->port_num]), pack->blk_pak.LBA_start & 0xFFFFFFFF, ((pack->blk_pak.LBA_start) >> 32) & 0xFFFFFFFF, pack->blk_pak.count, pack->blk_pak.buffer_vaddr);
|
||
break;
|
||
case AHCI_CMD_WRITE_DMA_EXT:
|
||
ret_val = ahci_write(&(ahci_devices[pack->ahci_ctrl_num].hba_mem->ports[pack->port_num]), pack->blk_pak.LBA_start & 0xFFFFFFFF, ((pack->blk_pak.LBA_start) >> 32) & 0xFFFFFFFF, pack->blk_pak.count, pack->blk_pak.buffer_vaddr);
|
||
break;
|
||
default:
|
||
kerror("Unsupport ahci command: %#05lx", pack->blk_pak.cmd);
|
||
ret_val = E_UNSUPPORTED_CMD;
|
||
break;
|
||
}
|
||
|
||
// ahci_end_request();
|
||
return ret_val;
|
||
}
|
||
|
||
/**
|
||
* @brief 将请求包提交到io队列
|
||
*
|
||
* @param pack
|
||
*/
|
||
static void ahci_submit(struct ahci_request_packet_t *pack)
|
||
{
|
||
list_append(&(ahci_req_queue.wait_queue_list.wait_list), &(pack->blk_pak.wait_queue.wait_list));
|
||
++ahci_req_queue.request_count;
|
||
|
||
if (ahci_req_queue.in_service == NULL) // 当前没有正在请求的io包，立即执行磁盘请求
|
||
ahci_query_disk();
|
||
}
|
||
|
||
/**
|
||
* @brief ahci驱动程序的传输函数
|
||
*
|
||
* @param cmd 控制命令
|
||
* @param base_addr 48位LBA地址
|
||
* @param count total sectors to read
|
||
* @param buf 缓冲区线性地址
|
||
* @param ahci_ctrl_num ahci控制器号
|
||
* @param port_num ahci控制器端口号
|
||
* @return long
|
||
*/
|
||
static long ahci_transfer(long cmd, uint64_t base_addr, uint64_t count, uint64_t buf, uint8_t ahci_ctrl_num, uint8_t port_num)
|
||
{
|
||
struct ahci_request_packet_t *pack = NULL;
|
||
|
||
if (cmd == AHCI_CMD_READ_DMA_EXT || cmd == AHCI_CMD_WRITE_DMA_EXT)
|
||
{
|
||
pack = ahci_make_request(cmd, base_addr, count, buf, ahci_ctrl_num, port_num);
|
||
ahci_submit(pack);
|
||
}
|
||
else
|
||
return E_UNSUPPORTED_CMD;
|
||
|
||
return AHCI_SUCCESS;
|
||
}
|
||
|
||
/**
|
||
* @brief todo: io控制器函数
|
||
*
|
||
* @param cmd 命令
|
||
* @param arg 参数
|
||
* @return long
|
||
*/
|
||
static long ahci_ioctl(long cmd, long arg)
|
||
{
|
||
}
|
||
struct block_device_operation ahci_operation =
|
||
{
|
||
.open = ahci_open,
|
||
.close = ahci_close,
|
||
.ioctl = ahci_ioctl,
|
||
.transfer = ahci_transfer,
|
||
};
|