Refactor the document of IOMMU functions

This commit is contained in:
Yuke Peng
2024-11-07 10:35:38 +08:00
committed by Tate, Hongliang Tian
parent c2626da757
commit 12aa9fc857
7 changed files with 15 additions and 15 deletions

View File

@ -98,7 +98,7 @@ impl RootTable {
Ok(()) Ok(())
} }
/// Specify the device page table instead of creating a page table if not exists. /// Specifies the device page table instead of creating a page table if not exists.
/// ///
/// This will be useful if we want all the devices to use the same page table. /// This will be useful if we want all the devices to use the same page table.
/// The original page table will be overwritten. /// The original page table will be overwritten.
@ -195,7 +195,7 @@ impl ContextEntry {
} }
} }
/// Get the second stage page translation pointer. /// Gets the second stage page translation pointer.
/// ///
/// This function will not right shift the value after the `and` operation. /// This function will not right shift the value after the `and` operation.
pub const fn second_stage_pointer(&self) -> u64 { pub const fn second_stage_pointer(&self) -> u64 {

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@ -35,7 +35,7 @@ impl FaultEventRegisters {
FaultStatus::from_bits_truncate(self.status.read()) FaultStatus::from_bits_truncate(self.status.read())
} }
/// Create an instance from base address. /// Creates an instance from base address.
/// ///
/// # Safety /// # Safety
/// ///

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@ -40,7 +40,7 @@ impl IrtEntryHandle {
self.entry_ref = None; self.entry_ref = None;
} }
/// Create a handle based on index and the interrupt remapping table base virtual address. /// Creates a handle based on index and the interrupt remapping table base virtual address.
/// ///
/// # Safety /// # Safety
/// ///

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@ -157,7 +157,7 @@ impl IrtEntry {
self.0 = 0 self.0 = 0
} }
/// Enable this entry with no validation, /// Enables this entry with no validation,
/// DST = 0, IM = 0, DLM = 0, TM = 0, RH = 0, DM = 0, FPD = 1, P = 1 /// DST = 0, IM = 0, DLM = 0, TM = 0, RH = 0, DM = 0, FPD = 1, P = 1
pub fn enable_default(&mut self, vector: u32) { pub fn enable_default(&mut self, vector: u32) {
self.0 = 0b11 | (vector as u128) << 16; self.0 = 0b11 | (vector as u128) << 16;

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@ -7,7 +7,7 @@ use bitflags::bitflags;
pub struct ExtendedCapability(u64); pub struct ExtendedCapability(u64);
impl ExtendedCapability { impl ExtendedCapability {
/// Create ExtendedCapability from `value` /// Creates ExtendedCapability from `value`
pub const fn new(value: u64) -> Self { pub const fn new(value: u64) -> Self {
Self(value) Self(value)
} }

View File

@ -29,7 +29,7 @@ pub struct InvalidationRegisters {
} }
impl InvalidationRegisters { impl InvalidationRegisters {
/// Create an instance from IOMMU base address. /// Creates an instance from IOMMU base address.
/// ///
/// # Safety /// # Safety
/// ///

View File

@ -81,7 +81,7 @@ pub struct IommuRegisters {
} }
impl IommuRegisters { impl IommuRegisters {
/// Version of IOMMU /// Reads the version of IOMMU
#[allow(dead_code)] #[allow(dead_code)]
pub fn read_version(&self) -> IommuVersion { pub fn read_version(&self) -> IommuVersion {
let version = self.version.read(); let version = self.version.read();
@ -91,22 +91,22 @@ impl IommuRegisters {
} }
} }
/// Capability of IOMMU /// Reads the capability of IOMMU
pub fn read_capability(&self) -> Capability { pub fn read_capability(&self) -> Capability {
Capability::new(self.capability.read()) Capability::new(self.capability.read())
} }
/// Extended Capability of IOMMU /// Reads the extended Capability of IOMMU
pub fn read_extended_capability(&self) -> ExtendedCapability { pub fn read_extended_capability(&self) -> ExtendedCapability {
ExtendedCapability::new(self.extended_capability.read()) ExtendedCapability::new(self.extended_capability.read())
} }
/// Global Status of IOMMU /// Reads the global Status of IOMMU
pub fn read_global_status(&self) -> GlobalStatus { pub fn read_global_status(&self) -> GlobalStatus {
GlobalStatus::from_bits_truncate(self.global_status.read()) GlobalStatus::from_bits_truncate(self.global_status.read())
} }
/// Enable DMA remapping with static RootTable /// Enables DMA remapping with static RootTable
pub(super) fn enable_dma_remapping( pub(super) fn enable_dma_remapping(
&mut self, &mut self,
root_table: &'static SpinLock<RootTable, LocalIrqDisabled>, root_table: &'static SpinLock<RootTable, LocalIrqDisabled>,
@ -122,7 +122,7 @@ impl IommuRegisters {
while !self.read_global_status().contains(GlobalStatus::TES) {} while !self.read_global_status().contains(GlobalStatus::TES) {}
} }
/// Enable Interrupt Remapping with IntRemappingTable /// Enables Interrupt Remapping with IntRemappingTable
pub(super) fn enable_interrupt_remapping(&mut self, table: &'static IntRemappingTable) { pub(super) fn enable_interrupt_remapping(&mut self, table: &'static IntRemappingTable) {
assert!(self assert!(self
.read_extended_capability() .read_extended_capability()
@ -223,7 +223,7 @@ impl IommuRegisters {
.write(0x9000_0000_0000_0000); .write(0x9000_0000_0000_0000);
} }
/// Write value to the global command register. This function will not wait until the command /// Writes value to the global command register. This function will not wait until the command
/// is serviced. User need to check the global status register. /// is serviced. User need to check the global status register.
fn write_global_command(&mut self, command: GlobalCommand, enable: bool) { fn write_global_command(&mut self, command: GlobalCommand, enable: bool) {
const ONE_SHOT_STATUS_MASK: u32 = 0x96FF_FFFF; const ONE_SHOT_STATUS_MASK: u32 = 0x96FF_FFFF;
@ -235,7 +235,7 @@ impl IommuRegisters {
} }
} }
/// Create an instance from base address /// Creates an instance from base address
fn new() -> Option<Self> { fn new() -> Option<Self> {
let dmar = Dmar::new()?; let dmar = Dmar::new()?;