Make ostd::trap::irq public

kernel/comps/softirq/src/lib.rs

@@ -13,7 +13,10 @@ use component::{init_component, ComponentInitError};
 use lock::is_softirq_enabled;
 use ostd::{
     cpu_local_cell,
-    trap::{disable_local, register_bottom_half_handler, DisabledLocalIrqGuard},
+    trap::{
+        irq::{disable_local, DisabledLocalIrqGuard},
+        register_bottom_half_handler,
+    },
 };
 use spin::Once;
 

kernel/comps/softirq/src/lock.rs

@@ -7,7 +7,7 @@ use ostd::{
         atomic_mode::{AsAtomicModeGuard, InAtomicMode},
         disable_preempt, DisabledPreemptGuard,
     },
-    trap::{disable_local, in_interrupt_context},
+    trap::{in_interrupt_context, irq::disable_local},
 };
 
 use crate::process_all_pending;

kernel/comps/softirq/src/taskless.rs

@@ -131,7 +131,7 @@ fn do_schedule(
     {
         return;
     }
-    let irq_guard = trap::disable_local();
+    let irq_guard = trap::irq::disable_local();
     taskless_list
         .get_with(&irq_guard)
         .borrow_mut()
@@ -158,7 +158,7 @@ fn taskless_softirq_handler(
     softirq_id: u8,
 ) {
     let mut processing_list = {
-        let irq_guard = trap::disable_local();
+        let irq_guard = trap::irq::disable_local();
         let guard = taskless_list.get_with(&irq_guard);
         let mut list_mut = guard.borrow_mut();
         LinkedList::take(list_mut.deref_mut())
@@ -170,7 +170,7 @@ fn taskless_softirq_handler(
             .compare_exchange(false, true, Ordering::Acquire, Ordering::Relaxed)
             .is_err()
         {
-            let irq_guard = trap::disable_local();
+            let irq_guard = trap::irq::disable_local();
             taskless_list
                 .get_with(&irq_guard)
                 .borrow_mut()

kernel/comps/virtio/src/transport/mmio/bus/common_device.rs

@@ -7,8 +7,8 @@ use log::info;
 #[cfg(target_arch = "x86_64")]
 use ostd::arch::kernel::MappedIrqLine;
 #[cfg(target_arch = "riscv64")] // TODO: Add `MappedIrqLine` support for RISC-V.
-use ostd::trap::IrqLine as MappedIrqLine;
-use ostd::{io::IoMem, mm::VmIoOnce, trap::IrqLine, Error, Result};
+use ostd::trap::irq::IrqLine as MappedIrqLine;
+use ostd::{io::IoMem, mm::VmIoOnce, trap::irq::IrqLine, Error, Result};
 
 /// A MMIO common device.
 #[derive(Debug)]

kernel/comps/virtio/src/transport/mmio/bus/mod.rs

@@ -28,7 +28,7 @@ pub(super) fn init() {
 fn x86_probe() {
     use common_device::{mmio_check_magic, mmio_read_device_id, MmioCommonDevice};
     use log::debug;
-    use ostd::{arch::kernel::IRQ_CHIP, io::IoMem, trap::IrqLine};
+    use ostd::{arch::kernel::IRQ_CHIP, io::IoMem, trap::irq::IrqLine};
 
     // TODO: The correct method for detecting VirtIO-MMIO devices on x86_64 systems is to parse the
     // kernel command line if ACPI tables are absent [1], or the ACPI SSDT if ACPI tables are

kernel/comps/virtio/src/transport/mmio/device.rs

@@ -11,7 +11,7 @@ use ostd::{
     io::IoMem,
     mm::{DmaCoherent, PAGE_SIZE},
     sync::RwLock,
-    trap::IrqCallbackFunction,
+    trap::irq::IrqCallbackFunction,
 };
 
 use super::{

kernel/comps/virtio/src/transport/mmio/multiplex.rs

@@ -8,7 +8,10 @@ use aster_util::safe_ptr::SafePtr;
 use ostd::{
     io::IoMem,
     sync::RwLock,
-    trap::{IrqCallbackFunction, IrqLine, TrapFrame},
+    trap::{
+        irq::{IrqCallbackFunction, IrqLine},
+        TrapFrame,
+    },
 };
 
 /// Multiplexing Irqs. The two interrupt types (configuration space change and queue interrupt)

kernel/comps/virtio/src/transport/mod.rs

@@ -9,7 +9,7 @@ use ostd::{
     bus::pci::cfg_space::Bar,
     io::IoMem,
     mm::{DmaCoherent, PodOnce},
-    trap::IrqCallbackFunction,
+    trap::irq::IrqCallbackFunction,
     Pod,
 };
 

kernel/comps/virtio/src/transport/pci/device.rs

@@ -15,7 +15,7 @@ use ostd::{
     },
     io::IoMem,
     mm::DmaCoherent,
-    trap::IrqCallbackFunction,
+    trap::irq::IrqCallbackFunction,
 };
 
 use super::{common_cfg::VirtioPciCommonCfg, msix::VirtioMsixManager};

kernel/comps/virtio/src/transport/pci/legacy.rs

@@ -12,7 +12,7 @@ use ostd::{
     },
     io::IoMem,
     mm::{DmaCoherent, HasDaddr, PAGE_SIZE},
-    trap::IrqCallbackFunction,
+    trap::irq::IrqCallbackFunction,
 };
 
 use crate::{

kernel/comps/virtio/src/transport/pci/msix.rs

@@ -2,7 +2,7 @@
 
 use alloc::vec::Vec;
 
-use ostd::{bus::pci::capability::msix::CapabilityMsixData, trap::IrqLine};
+use ostd::{bus::pci::capability::msix::CapabilityMsixData, trap::irq::IrqLine};
 
 pub struct VirtioMsixManager {
     config_msix_vector: u16,
@@ -20,7 +20,7 @@ impl VirtioMsixManager {
     pub fn new(mut msix: CapabilityMsixData) -> Self {
         let mut msix_vector_list: Vec<u16> = (0..msix.table_size()).collect();
         for i in msix_vector_list.iter() {
-            let irq = ostd::trap::IrqLine::alloc().unwrap();
+            let irq = IrqLine::alloc().unwrap();
             msix.set_interrupt_vector(irq, *i);
         }
         let config_msix_vector = msix_vector_list.pop().unwrap();